參數(shù)資料
型號： AT90S8535-8JI
廠商： Atmel
文件頁數(shù)： 73/127頁
文件大小： 0K
描述： IC MCU 8K 8MHZ A/D IT 44PLCC
標準包裝： 27
系列： AVR® 90S
核心處理器： AVR
芯體尺寸： 8-位
速度： 8MHz
連通性： SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 8KB（4K x 16）
程序存儲器類型： 閃存
EEPROM 大小： 512 x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
5
AT90S/LS8535
1041H–11/01
current if the pull-up resistors are activated. Two Port C pins can alternatively be used
as oscillator for Timer/Counter2.
The Port C pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors. The Port D output
buffers can sink 20 mA. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated.
Port D also serves the functions of various special features of the AT90S8535 as listed
The Port D pins are tri-stated when a reset condition becomes active, even if the clock is
not running.
RESET
Reset input. An external reset is generated by a low level on the RESET pin. Reset
pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
AVCC
AVCC is the supply voltage pin for Port A and the A/D Converter. If the ADC is not used,
this pin must be connected to VCC. If the ADC is used, this pin must be connected to
VCC via a low-pass filter. See page 68 for details on operation of the ADC.
AREF
AREF is the analog reference input for the A/D Converter. For ADC operations, a volt-
age in the range 2V to AVCC must be applied to this pin.
AGND
Analog ground. If the board has a separate analog ground plane, this pin should be con-
nected to this ground plane. Otherwise, connect to GND.
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