參數(shù)資料
型號(hào): AT90S8535-8JI
廠商: Atmel
文件頁(yè)數(shù): 59/127頁(yè)
文件大?。?/td> 0K
描述: IC MCU 8K 8MHZ A/D IT 44PLCC
標(biāo)準(zhǔn)包裝: 27
系列: AVR® 90S
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 8KB(4K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
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37
AT90S/LS8535
1041H–11/01
Note:
X = A or B.
In PWM mode, these bits have a different function. Refer to Table 15 for a detailed
description. When changing the COM1X1/COM1X0 bits, Output Compare Interrupt 1
must be disabled by clearing their Interrupt Enable bits in the TIMSK Register. Other-
wise an interrupt can occur when the bits are changed.
Bits 3..2 – Res: Reserved Bits
These bits are reserved bits in the AT90S8535 and always read zero.
Bits 1..0 – PWM11, PWM10: Pulse Width Modulator Select Bits
These bits select PWM operation of Timer/Counter1 as specified in Table 12. This mode
is described on page 40.
Timer/Counter1 Control
Register B – TCCR1B
Bit 7 – ICNC1: Input Capture1 Noise Canceler (4 CKs)
When the ICNC1 bit is cleared (zero), the Input Capture Trigger Noise Canceler function
is disabled. The input capture is triggered at the first rising/falling edge sampled on the
ICP (input capture pin) as specified. When the ICNC1 bit is set (one), four successive
samples are measured on the ICP (input capture pin), and all samples must be high/low
according to the input capture trigger specification in the ICES1 bit. The actual sampling
frequency is XTAL clock frequency.
Bit 6 – ICES1: Input Capture1 Edge Select
While the ICES1 bit is cleared (zero), the Timer/Counter1 contents are transferred to the
Input Capture Register (ICR1) on the falling edge of the input capture pin (ICP). While
the ICES1 bit is set (one), the Timer/Counter1 contents are transferred to the Input Cap-
ture Register (ICR1) on the rising edge of the input capture pin (ICP).
Bits 5, 4 – Res: Reserved Bits
These bits are reserved bits in the AT90S8535 and always read zero.
Table 11. Compare 1 Mode Select
COM1X1
COM1X0
Description
0
Timer/Counter1 disconnected from output pin OC1X
0
1
Toggle the OC1X output line.
1
0
Clear the OC1X output line (to zero).
1
Set the OC1X output line (to one).
Table 12. PWM Mode Select
PWM11
PWM10
Description
0
PWM operation of Timer/Counter1 is disabled
0
1
Timer/Counter1 is an 8-bit PWM
1
0
Timer/Counter1 is a 9-bit PWM
1
Timer/Counter1 is a 10-bit PWM
Bit
7
6
5
4
3210
$2E ($4E)
ICNC1
ICES1
––
CTC1
CS12
CS11
CS10
TCCR1B
Read/Write
R/W
R
R/W
Initial Value
0
0000
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