參數資料
型號: AT89C51RD2-SLRUM
廠商: Atmel
文件頁數: 79/137頁
文件大?。?/td> 0K
描述: IC MCU FLASH 8051 EEP 64K 44PLCC
產品培訓模塊: MCU Product Line Introduction
標準包裝: 1
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數: 34
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 標準包裝
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
其它名稱: AT89C51RD2-SLRUMDKR
46
4235K–8051–05/08
AT89C51RD2/ED2
Figure 13-6. PCA PWM Mode
13.5
PCA Watchdog Timer
An on-board watchdog timer is available with the PCA to improve the reliability of the system
without increasing chip count. Watchdog timers are useful for systems that are susceptible to
noise, power glitches, or electrostatic discharge. Module 4 is the only PCA module that can be
programmed as a watchdog. However, this module can still be used for other modes if the
watchdog is not needed. Figure 13-4 shows a diagram of how the watchdog works. The user
pre-loads a 16-bit value in the compare registers. Just like the other compare modes, this 16-bit
value is compared to the PCA timer value. If a match is allowed to occur, an internal reset will be
generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has three options:
1.
Periodically change the compare value so it will never match the PCA timer.
2.
Periodically change the PCA timer value so it will never match the compare values.
3.
Disable the watchdog by clearing the WDTE bit before a match occurs and then re-
enable it.
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n= 0 to 4
0xDA to 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
8-bit Comparator
CEXn
“0”
“1”
Enable
PCA Counter/Timer
Overflow
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