參數(shù)資料
型號: AT89C51RD2-SLRUM
廠商: Atmel
文件頁數(shù): 57/137頁
文件大小: 0K
描述: IC MCU FLASH 8051 EEP 64K 44PLCC
產(chǎn)品培訓模塊: MCU Product Line Introduction
標準包裝: 1
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: SPI,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 標準包裝
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
其它名稱: AT89C51RD2-SLRUMDKR
26
4235K–8051–05/08
AT89C51RD2/ED2
10. Reset
10.1
Introduction
The reset sources are: Power Management, Hardware Watchdog, PCA Watchdog and Reset
input.
Figure 10-1. Reset schematic
10.2
Reset Input
The Reset input can be used to force a reset pulse longer than the internal reset controlled by
the Power Monitor. RST input has a pull-down resistor allowing power-on reset by simply con-
necting an external capacitor to VCC as shown in Figure 10-2. Resistor value and input
characteristics are discussed in the Section “DC Characteristics” of the AT89C51RD2/ED2
datasheet.
Figure 10-2. Reset Circuitry and Power-On Reset
10.3
Reset Output
Reset output can be generated by two sources:
Internal POR/PFD
Hardware watchdog timer
As detailed in Section “Hardware Watchdog Timer”, page 84, the WDT generates a 96-clock
period pulse on the RST pin.
In order to properly propagate this pulse to the rest of the application in case of external capaci-
tor or power-supply supervisor circuit, a 1 k resistor must be added as shown Figure 10-3.
Power
Monitor
Hardware
Watchdog
PCA
Watchdog
RST
Internal Reset
RST
R
S
T
VSS
To internal reset
RST
VDD
+
b. Power-on Reset
a. RST input circuitry
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