參數(shù)資料
型號: AT89C5131A-RDTUM
廠商: Atmel
文件頁數(shù): 130/176頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 32K USB 64VQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 800
系列: AT89C513x
核心處理器: C52X2
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: LED,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
配用: AT89STK-10-ND - KIT EVAL APPL MASS STORAGE
AT89STK-05-ND - KIT STARTER FOR AT89C5131
56
AT89C5131
4136C–USB–04/05
The CMOD register includes three additional bits associated with the PCA (See
The CIDL bit allows the PCA to stop during idle mode.
The WDTE bit enables or disables the watchdog function on module 4.
The ECF bit when set causes an interrupt and the PCA overflow flag CF (in the
CCON SFR) to be set when the PCA timer overflows.
The CCON register contains the run control bit for the PCA and the flags for the PCA
timer (CF) and each module (see Table 50).
Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by
clearing this bit.
Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an
interrupt will be generated if the ECF bit in the CMOD register is set. The CF bit can
only be cleared by software.
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,
etc.) and are set by hardware when either a match or a capture occurs. These flags
can only be cleared by software.
Reset Value = 000X 0000b
Not bit addressable
Table 50. CCON Register
CCON - PCA Counter Control Register (D8h)
7654
3210
CF
CR
CCF4
CCF3
CCF2
CCF1
CCF0
Bit
Number
Bit
Mnemonic Description
7CF
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in
CMOD is set. CF may be set by either hardware or software but can only be cleared
by software.
6CR
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
5–
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
CCF4
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
3
CCF3
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
2
CCF2
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
1
CCF1
PCA Module 1 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
0
CCF0
PCA Module 0 Interrupt Flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
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