參數(shù)資料
型號(hào): AT89C5131A-RDTIL
廠商: Atmel
文件頁(yè)數(shù): 167/185頁(yè)
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 32K USB 64VQFP
標(biāo)準(zhǔn)包裝: 160
系列: AT89C513x
核心處理器: C52X2
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: LED,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤(pán)
配用: AT89STK-10-ND - KIT EVAL APPL MASS STORAGE
AT89STK-05-ND - KIT STARTER FOR AT89C5131
其它名稱(chēng): AT89C5131-RDTIL-ND
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dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DS70318F-page 82
2008-2012 Microchip Technology Inc.
5.2
RTSP Operation
The dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/
X04 Flash program memory array is organized into rows
of 64 instructions or 192 bytes. RTSP allows the user
application to erase a page of memory, which consists of
eight rows (512 instructions) at a time, and to program
one row or one word at a time. Table 24-12 shows typical
erase and programming times. The 8-row erase pages
and single row write rows are edge-aligned from the
beginning of program memory, on boundaries of
1536 bytes and 192 bytes, respectively.
The program memory implements holding buffers that
can contain 64 instructions of programming data. Prior
to the actual programming operation, the write data
must be loaded into the buffers sequentially. The
instruction words loaded must always be from a group
of 64 boundary.
The basic sequence for RTSP programming is to set up
a Table Pointer, then do a series of TBLWT instructions
to load the buffers. Programming is performed by
setting the control bits in the NVMCON register. A total
of 64 TBLWTL and TBLWTH instructions are required
to load the instructions.
All of the table write operations are single-word writes
(two instruction cycles) because only the buffers are
written.
A
programming
cycle
is
required
for
programming each row.
5.3
Programming Operations
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode.
The
processor
stalls
(waits)
until
the
programming operation is finished.
The programming time depends on the FRC accuracy
(see Table 24-20) and the value of the FRC Oscillator
Tuning register (see Register 8-4). Use the following
formula to calculate the minimum and maximum values
for the Row Write Time, Page Erase Time, and Word
Write Cycle Time parameters (see Table 24-12).
EQUATION 5-1:
PROGRAMMING TIME
For example, if the device is operating at +125°C, the
FRC accuracy will be ±5%. If the TUN<5:0> bits (see
Register 8-4) are set to ‘b111111, the minimum row
write time is equal to Equation 5-2.
EQUATION 5-2:
MINIMUM ROW WRITE
TIME
The maximum row write time is equal to Equation 5-3.
EQUATION 5-3:
MAXIMUM ROW WRITE
TIME
Setting the WR bit (NVMCON<15>) starts the opera-
tion, and the WR bit is automatically cleared when the
operation is finished.
5.4
Control Registers
Two SFRs are used to read and write the program
Flash memory: NVMCON and NVMKEY.
The NVMCON register (Register 5-1) controls which
blocks are to be erased, which memory type is to be
programmed and the start of the programming cycle.
NVMKEY is a write-only register that is used for write
protection. To start a programming or erase sequence,
the user application must consecutively write 0x55 and
0xAA to the NVMKEY register. Refer to Section 5.3
“Programming Operations” for further details.
T
7.37 MHz
FRC Accuracy
()%
FRC Tuning
()%
×
--------------------------------------------------------------------------------------------------------------------------
T
RW
11064 Cycles
7.37 MHz
10.05
+
()
1
0.00375
()
×
----------------------------------------------------------------------------------------------
1.435ms
=
T
RW
11064 Cycles
7.37 MHz
10.05
()
1
0.00375
()
×
----------------------------------------------------------------------------------------------
1.586ms
=
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