參數(shù)資料
型號: AM79C978
廠商: Advanced Micro Devices, Inc.
英文描述: Single-Chip 1/10 Mbps PCI Home Networking Controller
中文描述: 單芯片的1 / 10 Mbps的家庭網(wǎng)絡(luò)控制器的PCI
文件頁數(shù): 108/261頁
文件大?。?/td> 3803K
代理商: AM79C978
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁當(dāng)前第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁第257頁第258頁第259頁第260頁第261頁
108
Am79C978
PCI Expansion ROM Base Address Register
Offset 30h
The PCI Expansion ROM Base Address register is a
32-bit register that defines the base address, size, and
address alignment of an Expansion ROM. It is located
at offset 30h in the PCI Configuration Space.
Bit
Name
Description
31-20
ROMBASE Expansion ROM base address
most significant 12 bits. These
bits are written by the host to
specify the location of the Expan-
sion ROM in all of memory space.
ROMBASE must be written with a
valid
address
Am79C978 Expansion ROM ac-
cess is enabled by setting
ROMEN (PCI Expansion ROM
Base Address register, bit 0) and
MEMEN (PCI Command register,
bit 1).
before
the
Since the 12 most significant bits
of the base address are program-
mable, the host can map the Ex-
pansion
ROM
boundary.
on any
1M
When the Am79C978 controller
is enabled for Expansion ROM
access (ROMEN and MEMEN
are set to 1), it monitors the PCI
bus for a valid memory com-
mand. If the value on AD[31:2]
during the address phase of the
cycle falls between ROMBASE
and ROMBASE + 1M - 4, the
Am79C978 controller will drive
DEVSEL indicating it will respond
to the access.
ROMBASE is read and written by
the host. ROMBASE is cleared
by H_RESET and is not affected
by S_RESET or by setting the
STOP bit.
19-1
ROMSIZE
ROM size. Read as zeros; write
operation have no effect. ROM-
SIZE indicates the maximum size
of the Expansion ROM the
Am79C978 controller can sup-
port. The host can determine the
Expansion ROM size by writing
FFFF FFFFh to the Expansion
ROM Base Address register. It
will read back a value of 0 in bit
19-1, indicating an Expansion
ROM size of 1M.
Note that ROMSIZE only speci-
fies the maximum size of Expan-
sion
ROM
the
controller supports. A smaller
ROM can also be used. The actu-
al size of the code in the Expan-
sion ROM is always determined
by reading the Expansion ROM
header.
Am79C978
0
ROMEN
Expansion ROM Enable. Written
by the host to enable access to
the
Expansion
Am79C978 controller will only re-
spond to accesses to the Expan-
sion ROM when both ROMEN
and MEMEN (PCI Command reg-
ister, bit 1) are set to 1.
ROM.
The
ROMEN is read and written by
the host. ROMEN is cleared by
H_RESET and is not effected by
S_RESET or by setting the STOP
bit.
PCI Capabilities Pointer Register
Offset 34h
Bit
Name
Description
7-0
CAP_PTR
The PCI Capabilities Pointer reg-
ister is an 8-bit register that points
to a linked list of capabilities im-
plemented on this device. This
register has a default value of
40h.
The PCI Capabilities Pointer reg-
ister is located at offset 34h in the
PCI Configuration Space. It is
read only.
PCI Interrupt Line Register
Offset 3Ch
The PCI Interrupt Line register is an 8-bit register that
is used to communicate the routing of the interrupt.
This register is written by the POST software as it ini-
tializes the Am79C978 controller in the system. The
register is read by the network driver to determine the
interrupt channel which the POST software has as-
signed to the Am79C978 controller. The PCI Interrupt
Line register is not modified by the Am79C978 control-
ler. It has no effect on the operation of the device.
The PCI Interrupt Line register is located at offset 3Ch
in the PCI Configuration Space. It is read and written by
相關(guān)PDF資料
PDF描述
AM79C981 Integrated Multiport Repeater Plus⑩ (IMR+⑩)
AM79C981JC Integrated Multiport Repeater Plus⑩ (IMR+⑩)
AM79C982 basic Integrated Multiport Repeater (bIMR)
AM79C982-4JC basic Integrated Multiport Repeater (bIMR)
AM79C982-8JC basic Integrated Multiport Repeater (bIMR)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C978A 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller
AM79C978AKC\\W 制造商:Advanced Micro Devices 功能描述:
AM79C978AKC\W 制造商:Advanced Micro Devices 功能描述:
AM79C978AKCW 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Single-Chip 1/10 Mbps PCI Home Networking Controller