- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄366550 > AM79C971KCW (ADVANCED MICRO DEVICES INC) IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE PDF資料下載
參數(shù)資料
| 型號： | AM79C971KCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE |
| 中文描述： | 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP16 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 147/265頁 |
| 文件大?。?/td> | 3190K |
| 代理商： | AM79C971KCW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁當(dāng)前第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁第257頁第258頁第259頁第260頁第261頁第262頁第263頁第264頁第265頁
Am79C971
147
P R E L I M I N A R Y
Read/Write accessible only when
either the STOP or the SPND bit
is set. This register is set to
0600h
by
S_RESET and is unaffected by
STOP.
H_RESET
or
CSR112: Missed Frame Count
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-0
MFC
Missed Frame Count. Indicates
the number of missed frames.
MFC will roll over to a count of 0
from the value 65535. The MFCO
bit of CSR4 (bit 8) will be set each
time that this occurs.
Read accessible always. MFC is
read only, write operations are ig-
nored. MFC is cleared by
H_RESET or S_RESET or by
setting the STOP bit.
CSR114: Receive Collision Count
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-0
RCC
Receive Collision Count. Indi-
cates the total number of colli-
sions
encountered
receiver since the last reset of the
counter.
by
the
RCC will roll over to a count of 0
from the value 65535. The
RCVCCO bit of CSR4 (bit 5) will
be set each time that this occurs.
Read accessible always. RCC is
read only, write operations are ig-
nored. RCC is cleared by
H_RESET or S_RESET, or by
setting the STOP bit.
CSR122: Advanced Feature Control
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-1
RES
Reserved locations. Written as
zeros and read as undefined.
0
RCVALGN
Receive Packet Align. When set,
this bit forces the data field of ISO
8802-3 (IEEE/ANSI 802.3) pack-
ets to align to 0. MOD 4 address
boundaries (i.e., DWord aligned
addresses). It is important to note
that this feature will only function
correctly if all receive buffer
boundaries are DWord aligned
and all receive buffers have 0
MOD 4 lengths. In order to ac-
complish the data alignment, the
Am79C971 controller simply in-
serts two bytes of random data at
the beginning of the receive pack-
et (i.e., before the ISO 8802-3
(IEEE/ANSI 802.3) destination
address field). The MCNT field
reported to the receive descriptor
will not include the extra two
bytes.
Read/Write accessible always.
RCVALGN
is
H_RESET or S_RESET and is
not affected by STOP.
cleared
by
CSR124: Test Register 1
This register is used to place the Am79C971 controller
into various test modes. The Runt Packet Accept is the
only user accessible test mode. All other test modes are
for AMD internal use only.
Bit
Name
Description
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-4
RES
Reserved locations. Written as
zeros and read as undefined.
3
RPA
Runt Packet Accept. This bit
forces the Am79C971 controller
to accept runt packets (packets
shorter than 64 bytes).
Read accessible always; write
accessible only when STOP is
set to 1. RPA is cleared by
H_RESET or S_RESET and is
not affected by STOP.
2-0
RES
Reserved locations. Written as
zeros and read as undefined.
CSR125: MAC Enhanced Configuration Control
Bit
Name
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM79C972BKCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972 | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C971VCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C972 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。