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| 型號(hào)： | AM79C940VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Media Access Controller for Ethernet (MACE) |
| 中文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP80 |
| 封裝： | TQFP-80 |
| 文件頁(yè)數(shù)： | 42/122頁(yè) |
| 文件大?。?/td> | 914K |
| 代理商： | AM79C940VCW |
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AMD
42
Am79C940
extraneous noise, primarily caused by coupling from co-
resident services (crosstalk). For this reason, it is rec-
ommended that when using the Low Receive Threshold
option that the service should be installed on 4-pair ca-
ble only. Multi-pair cables within the same outer sheath
have lower crosstalk attenuation, and may allow noise
emitted from adjacent pairs to couple into the receive
pair, and be of sufficient amplitude to falsely unsquelch
the 10BASE-T MAU receiver.
Link Test Function
The link test function is implemented as specified by
10BASE-T standard. During periods of transmit pair
inactivity, Link Test pulses will be periodically sent
over the twisted pair medium to constantly monitor
medium integrity.
When the link test function is enabled, the absence of
Link Test pulses and receive data on the RXD
±
pair will
cause the 10BASE-T MAU to go into a Link Fail state. In
the Link Fail state, data transmission, data reception,
data loopback and the collision detection functions are
disabled, and remain disabled until valid data or >5 con-
secutive link pulses appear on the RXD
±
pair. During
Link Fail, the
LNKST
pin is inactive (externally pulled
HIGH), and the Link Fail bit (LNKFL in the PHY Configu-
ration Control register) will be set. When the link is iden-
tified as functional, the
LNKST
pin is driven LOW
(capable of directly driving a Link OK LED using an inte-
grated 12 mA driver) and the LNKFL bit will be cleared.
In order to inter-operate with systems which do not im-
plement link test, this function can be disabled by setting
the the Disable Link Test bit (DLNKTST in the PHY Con-
figuration Control register). With link test disabled, the
data driver, receiver and loopback functions as well as
collision detection remain enabled irrespective of the
presence or absence of data or link pulses on the
RXD
±
pair.
The MACE devices integrated 10BASE-T transceiver
will mimic the performance of an externally connected
device (such as a 10BASE-T MAU connected using an
AUI). When the 10BASE-T transceiver is in link fail, the
receive data path of the transceiver must be disabled.
The MACE device will report a Loss of Carrier error
(LCAR bit in the Transmit Frame Status register) due to
the absence of the normal loopback path, for every
packet transmitted during the link fail condition. In addi-
tion, a Collision Error (CERR bit in the Transmit Frame
Status register) will also be reported (see the section on
Signal Quality Error Test Function for additional details).
If the AWAKE bit is set in the PHY Configuration Control
register prior to the assertion of the hardware
SLEEP
pin, the 10BASE-T receiver remains operable, and is
able to detect and indicate (using the
LNKST
output) the
presence of legitimate Link Test pulses or receive activ-
ity. The transmission of Link Test pulses is suspended to
reduce power consumption.
If the RWAKE bit is set in the PHY Configuration Control
register prior to the assertion of the hardware
SLEEP
pin, the 10BASE-T receiver and transmitter functions re-
main active, the
LNKST
output is disabled, and the EADI
output pins are enabled. In addition the AUI port (trans-
mit and receive) remains active. Note that since the
MAC core will be in a sleep mode, no transmit activity is
possible, and the transmission of Link Test pulses is
also suspended to reduce power consumption.
Polarity Detection and Reversal
The Twisted Pair receive function includes the ability to
invert the polarity of the signals appearing at the RXD
±
pair if the polarity of the received signal is reversed
(such as in the case of a wiring error). This feature al-
lows data packets received from a reverse wired RXD
±
input pair to be corrected in the 10BASE-T MAU prior to
transfer to the MENDEC. The polarity detection function
is activated following reset or Link Fail, and will reverse
the receive polarity based on both the polarity of any
previous Link Test pulses and the polarity of subsequent
packets with a valid End Transmit Delimiter (ETD).
When in the Link Fail state, the internal 10BASE-T re-
ceiver will recognize Link Test pulses of either positive
or negative polarity. Exit from the Link Fail state is made
due to the reception of five to six consecutive Link Test
pulses of identical polarity. On entry to the Link Pass
state, the polarity of the last five Link Test pulses is used
to determine the initial receive polarity configuration and
the receiver is reconfigured to subsequently recognize
only Link Test pulses of the previously recognized polar-
ity. This link pulse algorithm is employed only until ETD
polarity determination is made as described later in
this section.
Positive Link Test pulses are defined as received signal
with a positive amplitude greater than 520 mV (LRT =
LOW) with a pulse width of 60 ns–200 ns. This positive
excursion may be followed by a negative excursion.
This definition is consistent with the expected received
signal at a correctly wired receiver, when a Link Test
pulse which fits the template of Figure 14-12 in the
10BASE-T Standard is generated at a transmitter and
passed through 100 m of twisted pair cable.
Negative Link Test pulses are defined as received sig-
nals with a negative amplitude greater than 520 mV
(LRT = LOW) with a pulse width of 60 ns–200 ns. This
negative excursion may be followed by a positive excur-
sion. This definition is consistent with the expected re-
ceived signal at a reverse wired receiver, when a Link
Test pulse which fits the template of Figure 14-12 in the
10BASE-T Standard is generated at a transmitter and
passed through 100 m of twisted pair cable.
The polarity detection/correction algorithm will remain
armeduntil two consecutive packets with valid ETD of
identical polarity are detected. When armed, the
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