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| 型號(hào)： | AM79C940VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Media Access Controller for Ethernet (MACE) |
| 中文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP80 |
| 封裝： | TQFP-80 |
| 文件頁(yè)數(shù)： | 27/122頁(yè) |
| 文件大?。?/td> | 914K |
| 代理商： | AM79C940VCW |
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AMD
27
Am79C940
TMS, and TDI pins. SCLK must run for 5 cycles after the
assertion of
SLEEP
. During the “Deep Sleep”, the SCLK
input can be optionally suspended for maximum power
savings. Upon exiting “Deep Sleep”, the hardware
RESET
pin must be asserted and the SCLK restored.
The system must delay the setting of the bits in the MAC
configuration Control Register of the internal analog
circuits by 1 ns to allow for stabilization.
If the AWAKE bit is set prior to the activation of
SLEEP
,
the 10BASE-T receiver and the
LNKST
output pin re-
main operational.
If the RWAKE bit is set prior to
SLEEP
being asserted,
the Manchester encoder/decoder, AUI and 10BASE-T
cells remain operational, as do the SRD, SRDCLK and
SF/BD outputs.
The input on XTAL1 must remain active for the AWAKE
or RWAKE features to operate. After exit from the Auto
Wake or Remote Wake modes, activation of hardware
RESET
is not required when
SLEEP
is reasserted.
On deassertion of
SLEEP
, the MACE device will go
through an internally generated hardware reset se-
quence, requiring re-initialization of MACE registers.
Power Supply
DV
DD
Digital Power
There are four Digital V
DD
pins.
DV
SS
Digital Ground
There are six Digital V
SS
pins.
AV
DD
Analog Power
There are four analog VDD pins. Special attention
should be paid to the printed circuit board layout to avoid
excessive noise on the supply to the PLL in the
Manchester encoder/decoder (pins 66 and 83 in PLCC,
pins 67 and 88 in PQFP). These supply lines should be
kept separate from the DV
DD
lines as far back to the
power supply as is practically possible.
AV
SS
Analog Ground
There are two analog VSS pins. Special attention
should be paid to the printed circuit board layout to avoid
excessive noise on the PLL supply in Manchester en-
coder/decoder (pin 73 in PLCC, pin 74 in PQFP). These
supply lines should be kept separate from the DV
SS
lines
as far back to the power supply as is practically possible.
PIN FUNCTIONS NOT AVAILABLE WITH
THE 80-PIN TQFP PACKAGE
In the 84-pin PLCC configuration, ALLthe pins are used
while in the 100-pin PQFP version, 16 pins are specified
as No Connects. Moving to the 80-pin TQFP configura-
tion requires the removal of 4 pins. Since Ethernet con-
trollers with integrated 10BASE-T have analog portions
which are very sensitive to noise, power and ground
pins are not deleted. The MACE device does have
several sets of media interfaces which typically go un-
used in most designs, however. Pins from some of
these interfaces are deleted instead. Removed are
the following:
I
TXDAT– (previously used for the DAI interface)
I
SRD (previously used for the EADI interface)
I
DTV (previously used for the host interface)
I
RXPOL (previously used as a receive frame
polarity LED driver)
Note that pins from four separate interfaces are re-
moved rather than removing all the pins from a single in-
terface. Each of these pins comes from one of the four
sides of the device. This is done to maintain symmetry,
thus avoiding bond out problems.
In general, the most critical of the four removed pins are
TXDAT– and SRD. Depending on the application, either
the DAI or the EADI interface may be important. In most
designs, however, this will not be the case.
PINS REMOVED AND THEIR EFFECTS
TXDAT–
The removal of TXDAT– means that the DAI interface is
no longer usable. The DAI interface was designed to be
used with media types that do not require DC isolation
between the MAU and the DTE. Media which do not
require DC isolation can be implemented more simply
using the DAI interface, rather than the AUI interface. In
most designs this is not a problem because most
media requires DC isolation (10BASE-T, 10BASE2,
10BASE5) and will use the AUI port. About the only me-
dia which does not require DC isolation is 10BASE-F.
SRD
The SRD pin is an output pin used by the MACE device
to transfer a receive data stream to external address
detection logic. It is part of the EADI interface. This pin is
used to help interface the MACE device to an external
CAM device. Use of an external CAM is typically re-
quired when an application will operate in promiscuous
mode and will need perfect filtering (i.e., the internal
hash filter will not suffice). Example applications for this
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