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參數(shù)資料
| 型號(hào)： | Am79C874 |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | NetPHY-1LP Low Power 10/100-TX/FX Ethernet Transceiver |
| 中文描述： | NetPHY - 1LP低功率10/100-TX/FX以太網(wǎng)收發(fā)器 |
| 文件頁數(shù)： | 31/60頁 |
| 文件大小： | 869K |
| 代理商： | AM79C874 |
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Am79C874
31
P R E L I M I N A R Y
MII Management Status Register (Register 1)
Table 11.
MII Management Status Register (Register 1)
PHY Identifier 1 Register (Register 2)
Table 12.
PHY Identifier 1 Register (Register 2)
Reg
Bit
Name
Description
Read/
Write
Default
1
15
100BASE-T4
1 = 100BASE-T4 able.
0 = Not 100BASE-T4 able.
RO
0
1
14
100BASE-TX Full
Duplex
1 = 100BASE-TX Full Duplex.
0 = No 100BASE-TX Full Duplex ability.
RO
set by
TECH[2:0]
pins
1
13
100BASE-TX Half
Duplex
1 = 100BASE-TX Half Duplex.
0 = No TX half-duplex ability.
RO
set by
TECH[2:0]
pins
1
12
10BASE-T Full
Duplex
1 = 10BASE-T Full Duplex.
0 = No 10BASE-T Full Duplex ability.
RO
set by
TECH[2:0]
pins
1
11
10BASE-T Half
Duplex
1 = 10BASE-T Half Duplex.
0 = No 10BASE-T ability.
RO
set by
TECH[2:0]
pins
1
10:7
Reserved
Ignore when read.
RO
0
1
6
Management
Frame Preamble
Suppression
The device accepts management frames that do not have a
preamble after receiving a management frame with a 32-bit or
longer preamble.
RO
1
1
5
Auto-Negotiation
Complete
1 = Auto-Negotiation process completed. Registers 4, 5, and 6
are valid after this bit is set.
0 = Auto-Negotiation process not completed.
RO
0
1
4
Remote Fault
1 = Remote fault condition detected.
0 = No remote fault.
This bit will remain set until it is read via the management
interface.
RO/LH
0
1
3
Auto-Negotiation
Ability
1 = Able to perform Auto-Negotiation function; value is
determined by ANEGA pin.
0 = Unable to perform Auto-Negotiation function.
RO
set by
ANEGA pin
1
2
Link Status
1 = Link is established; however, if the NetPHY-1LP device link
fails, this bit will be cleared and remain cleared until Register 1
is read via management interface.
0 = link is down.
RO/LL
0
1
1
Jabber Detect
1 = Jabber condition detected.
0 = No Jabber condition detected.
RO/LH
0
1
0
Extended
Capability
1 = Extended register capable. This bit is tied permanently to
one.
RO
1
Reg
Name
Description
Read/
Write
Default
2
15
OUI
Composed of the 3rd through 18th bits of the Organizationally
Unique Identifier (OUI), respectively.
RO
0022(H)
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