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參數(shù)資料
| 型號： | AM7969-125VB3A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| 中文描述： | TAXIchip集成電路（透明異步Xmitter，接收器接口） |
| 文件頁數(shù)： | 57/127頁 |
| 文件大?。?/td> | 730K |
| 代理商： | AM7969-125VB3A |
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AMD
53
TAXIchip Integrated Circuits Technical Manual
Figure 2-1
Basic T AX Ic hip Operation
6. The Data
comes out the
RX and Data
Strobe is
Raised
Am7968
Transmitter
Am7969
Receiver
1. Parallel Data
is Entered by
the User
2. The Data is
Strobed in by
the User
3. The Data is
Encoded and
then Converted
into a Serial
Stream
4. The Serial
Data is Sent
Out
5. The Re-
ceiver takes the
Serial Data and
Converts it
Back to Parallel
Data and then
Decodes it
Data Out
Data
Strobe
Data In
Strobe
Acknowledge
12330E-3
Three different widths are possible: 8 Data and 4 Command bits, 9 Data and 3 Com-
mand bits, and 10 Data and 2 Command bits. This choice of data and control bus widths
allows flexibility to meet different system bus width requirements, while providing the
capability of merging control and data into a common data stream.
2.2 Operational Modes: Loc al, Casc ade and T est
A TAXIchip set point-to-point link can be operated in one of three modes: Local,
Cascade, or Test. Local mode consists of a single Transmitter communicating with a
single Receiver over the serial medium. Cascade mode for Am7968/7969-125 consists
of a single Transmitter driving two or more daisy chained (cascaded) Receivers over a
single serial medium. Cascade Operation for Am7968/Am7969-175 consists of a single
Transmitter driving a single Receiver as shown in Appendix C, TAXI TIPs #13 and #14.
Cascade mode permits direct interface with 16-bit, 32-bit and wider busses. The link
may be operated in any of the above modes using the TAXl’s internal PLL for bit rate
generation and tracking, or the link may be run in Test Mode with external frequency
multiplying and data tracking PLLs.
3.0 DAT A ENCODING, V IOLAT ION AND S Y NCS
3.1 Data Enc oding
Any form of serial data transmission requires some form of encoding before the data are
output to the transmission medium. Encoding is the process of converting a set of m
data bits to a set of ncode bits.
The purpose of the encoding operation is to include clock information in the data stream.
Without this timing information, the Receiver would not be able to distinguish adjacent
bits of the same value. For example, if we transmit a thousand ONEs followed by a
ZERO, the Receiver might detect only 999 ONEs, or perhaps 1001 ONEs, followed by
one or two ZEROs. An accurate clock is needed to tell the Receiver when to sample the
incoming bit stream to determine if the bit is a ONE or a ZERO. Since the Transmitter
and Receiver have only one data path between them, the clock (timing) information
must be included in the serial data stream.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM7968-175JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-175JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125DC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| Am7968-125DMC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7968-125JC | TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM7969-125VBXA | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969-175 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface) |
| AM7969175DC | 制造商:AMD 功能描述:* |
| AM7969-175DC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM7969-175DCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Receiver |
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