參數(shù)資料
型號: AM29DS323DT50WMIN
廠商: Advanced Micro Devices, Inc.
英文描述: 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 1.8 Volt-only, Simultaneous Operation Flash Memory
中文描述: 32兆位(4個M × 8位/ 2米x 16位),1.8伏的CMOS只,同時作業(yè)快閃記憶體
文件頁數(shù): 42/56頁
文件大?。?/td> 641K
代理商: AM29DS323DT50WMIN
40
Am29DS323D
23480A5 October10,2006
D A T A S H E E T
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the
“Erase And Programming Performance”
section for more information.
Parameter
110
120
JEDEC
Std
Description
Unit
t
AVAV
t
WC
Write Cycle Time
(Note 1)
Min
110
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
50
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
50
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
50
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation
(Note 2)
Byte
Typ
9
μs
Word
Typ
13
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte
(Note 2)
Typ
7
μs
t
WHWH2
t
WHWH2
Sector Erase Operation
(Note 2)
Typ
2
sec
t
VCS
V
CC
Setup Time
(Note 1)
Min
50
μs
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Min
90
ns
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