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參數(shù)資料
| 型號： | AK5701_07 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 16-Bit ツヒ Stereo ADC with PLL & MIC-AMP |
| 中文描述： | 16位ツヒ立體聲ADC帶鎖相環(huán) |
| 文件頁數(shù)： | 6/64頁 |
| 文件大?。?/td> | 747K |
| 代理商： | AK5701_07 |
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[AK5701]
ANALOG CHARACTERISTICS
(Ta=25
°
C; AVDD, DVDD=3.0V; AVSS=DVSS=0V; PLL Master Mode; MCKI=12MHz, fs=44.0995kHz, BCLK=64fs;
Signal Frequency=1kHz; 16bit Data; Measurement frequency=20Hz
～
20kHz; unless otherwise specified)
Parameter
MIC Amplifier:
LIN1, RIN1, LIN2, RIN2 pins; MDIF1 = MDIF2 bits = “0” (Single-ended inputs)
MGAIN1-0 bits = “00”
Input
Resistance
MGAIN1-0 bits = “01” or “10”
MGAIN1-0 bits = “00”
MGAIN1-0 bits = “01”
Gain
MGAIN1-0 bits = “10”
MIC Amplifier:
LIN+, LIN
, RIN+, RIN
pins; MDIF1 = MDIF2 bits = “1” (Full-differential input)
Input Voltage (
Note 7
)
MGAIN1-0 bits = “01”
MGAIN1-0 bits = “10”
MIC Power Supply:
MPWR pin
Output Voltage (
Note 8
)
Load Resistance
Load Capacitance
ADC Analog Input Characteristics:
LIN1/RIN1/LIN2/RIN2 pins (Single-ended inputs)
→
ADC
→
IVOL,
MGAIN=+15dB, IVOL=0dB, ALC=OFF
Resolution
MGAIN=+30dB
MGAIN=+15dB
Input Voltage (
Note 9
)
MGAIN=0dB
S/(N+D) (
0.5dBFS) (
Note 10
)
D-Range (
60dBFS, A-weighted) (
Note 11
)
S/N (A-weighted) (
Note 11
)
Interchannel Isolation (
Note 12
)
MGAIN=+30dB
MGAIN=+15dB
Interchannel Gain Mismatch
MGAIN=0dB
Power Supplies:
Power Supply Current: AVDD+DVDD
Power Up (PDN pin = “H”) (
Note 13
)
Power Down (PDN pin = “L”) (
Note 14
)
Note 7. The voltage difference between LIN+/RIN+ and LIN
/RIN
pins. AC coupling capacitor should be connected in
series at each input pin. Full-differential input is not available at MGAIN1-0 bits = “00”. Maximum input voltage
of LIN+, LIN
, RIN+ and RIN
pins is proportional to AVDD voltage, respectively.
Vin = |(L/RIN+)
(L/RIN
)| = 0.123 x AVDD (max)@MGAIN1-0 bits = “01”, 0.022 x AVDD
(max)@MGAIN1-0 bits = “10”.
When the signal larger than above value is input to LIN+, LIN
, RIN+ or RIN
pin, ADC does not operate
normally.
Note 8. Output voltage is proportional to AVDD voltage. Vout = 0.75 x AVDD (typ).
Note 9. Input voltage is proportional to AVDD voltage. Vin = 0.107 x AVDD (typ)@MGAIN1-0 bits = “01” (+15dB),
Vin = 0.6 x AVDD(typ)@MGAIN1-0 bits = “00” (0dB).
Note 10. 80dB(typ)@MGAIN=0dB, 70dB(typ)@MGAIN=+30dB
Note 11. 89dB(typ)@MGAIN=0dB, 77dB(typ)@MGAIN=+30dB
Note 12. 100dB(typ)@MGAIN=0dB, 80dB(typ)@MGAIN=+30dB
Note 13. PLL Master Mode (MCKI=12MHz), PMADL = PMADR = PMVCM = PMPLL = PMMP = M/S bits = “1” and
MCKO bit = “0”. MPWR pin outputs 0mA. AVDD=6.4mA(typ), DVDD=1.6mA(typ).
EXT Slave Mode (PMPLL = M/S = MCKO bits = “0”): AVDD=5.7mA(typ), DVDD=1.3mA(typ).
Bypass Mode (THR bit = “1”, PMADL = PMADR = M/S bits = “0”), fs=8kHz: AVDD=1
μ
A(typ),
DVDD=150
μ
A(typ).
Note 14. All digital input pins are fixed to DVDD or DVSS.
Min
Typ
max
Units
k
Ω
k
Ω
dB
dB
dB
40
20
-
-
-
60
30
0
+15
+30
80
40
-
-
-
-
-
-
-
0.37
0.066
2.48
-
30
Vpp
Vpp
V
k
Ω
pF
2.02
0.5
-
2.25
-
-
-
-
-
16
-
0.37
2.07
-
-
-
-
-
1.0
0.5
Bits
Vpp
Vpp
Vpp
dB
dB
dB
dB
dB
dB
dB
0.057
0.32
1.80
77
87
87
90
0.2
0.2
0.2
0.27
1.53
67
79
79
80
-
-
-
-
-
8
1
12
20
mA
μ
A
MS0404-E-02
2007/08
- 6 -
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