參數(shù)資料
型號(hào)： AK4673
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/HP-AMP and Touch Screen Controller
中文描述： 立體聲編解碼器麥克風(fēng)/惠普- AMP及觸摸屏控制器
文件頁(yè)數(shù)： 78/107頁(yè)
文件大?。?/td> 1171K
代理商： AK4673
[AK4673]
MS0670-E-00
2007/09
- 78 -
■
Pen Interrupt
The AK4673 has a pen-interrupt function to detect the pen touch on the touch panel. This function will be used as the
interrupt of the microprocessor. Pen interrupt function is enabled at power-down state. YN driver is on and this pin is
connected to GND at the power down state. And the XP pin is pulled up via an internal resister (Ri), typically 10K
Ω
. If
the touch plate is touched by pen or stylus, the current flows via <VCC>-<Ri>-<XP>-<the plates>-<YN>-<GND>. The
resistance of the plate is generally 1K
Ω
or less, the PENIQRN pin is force to “L” level. If the pen is released, the
PENIRQN pin returns “H” level because two plates are disconnected, and the current does not flow via two plates.
The transition of PENIRQN is related to PD0 bit. PD0 bit is updated as shown below. (Please see “power-down control”
for the detail. Once the control command PD0= “1” is sent the pen-interrupt function is disabled.
The clock number under the write and the read operation refer to
Figure 74
and
Figure 14
.
I.
The period from start condition to SCL7
↓
The level transition of the PENIRQN pin is determined by PD0 bit of the previous command. When the previous
command with PD0= “0” the pen-interrupt function will be enabled. The PENIRQN pin is low when the panel is
touch, the PENIRQN pin is “H” when the panel is untouched. When the previous command with PD0= “1” is
sent PENIRQN pin is low regardless of pen-touch
II.
The period SCL7
↓
to SCL8
↑
on the write operation
The level of the PENIRQN pin is always low regardless of PD0 bit and the state of panel (touched/untouched)
III.
The period from SCL8
↑
to SCL18
↓
on the write operation
The level transition of the PENIRQN pin is determined by PD0 bit of the previous command. When the previous
command with PD0= “0” the pen-interrupt function will be enabled. The PENIRQN pin is low when the panel is
touch, the PENIRQN pin is “H” when the panel is untouched. When the previous command with PD0= “1” is
sent PENIRQN pin is low regardless of pen-touch
IV.
The period from SCL18
↓
on the write operation to SCL7
↓
on the read operation
The level of PENIRQN pin is determined by the A2 bit and PD0 bit of the present command. The PENIRQN pin
is always low regardless pen-touch when command with A2 = “1” or PD0 = “1” is set. The PENIRQN is
determined by the pen-touch (touched/untouched) when command with A2= “1” and PD0= “1” is sent.
V.
The period from SCL7
↓
to SCL21
↓
on the write operation
The AD input will sample the hold and the conversion will be done during this period. PENIRQN is always low.
VI.
The period after SCL21
↓
on the read operation
The level transition of the PENIRQN pin is determined by PD0 bit of the present command. When the present
command PD0= “0” is sent the pen-interrupt function will be enabled. The PENIRQN pin is low when the panel
is touched. The PENIRQN pin is “H” when the panel is untouched. When the present command PD0= “1” are
sent the PENIRQN pin is low regardless of pen-touch.
It is recommended that the processor will mask the pseudo interrupt while the control command is issued or AD data is
sent to processor.
XP
PENIRQN
Driver ON
YN
EN2
Ri =
10k
Ω
Driver OFF
EN1
VCC
VCC
VCC
PEN Interrupt
To uP
Figure 76 Pen interrupt function block
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