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參數(shù)資料
| 型號： | AK4646EZ |
| 廠商： | ASAHI KASEI POWER DEVICES CORP |
| 元件分類： | 消費家電 |
| 英文描述： | Stereo CODEC with MIC/SPK-AMP |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 4 X 4 MM, 0.40 MM PITCH, LEAD FREE, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 19/78頁 |
| 文件大?。?/td> | 808K |
| 代理商： | AK4646EZ |
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[AK4646EZ]
MS0630-E-00
2007/06
- 19 -
OPERATION OVERVIEW
■
System Clock
There are the following five clock modes to interface with external devices (Table 1 and Table 2).
Mode
PLL Master Mode (Note 32)
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
EXT Master Mode
Note 32. If M/S bit = “1”, PMPLL bit = “0” and MCKO bit = “1” during the setting of PLL Master Mode, the invalid
clocks are output from MCKO pin when MCKO bit is “1”.
Table 1. Clock Mode Setting (x: Don’t care)
Mode
MCKO bit
0
PLL Master Mode
1
PMPLL bit
1
M/S bit
1
PLL3-0 bits
Table 4
Figure
Figure 12
1
0
Table 4
Figure 13
1
0
Table 4
Figure 14
Figure 15
Figure 16
Figure 17
0
0
0
1
x
x
MCKO pin
“L”
Selected by
PS1-0 bits
“L”
Selected by
PS1-0 bits
MCKI pin
BICK pin
Output
(Selected by
BCKO bit)
Input
(Selected by
BCKO bit)
Input
(Selected by
BCKO bit)
Input
(
≥
32fs)
Output
(Selected by
BCKO bit)
LRCK pin
Selected by
PLL3-0 bits
Output
(1fs)
0
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
1
Selected by
PLL3-0 bits
Input
(1fs)
PLL Slave Mode
(PLL Reference Clock: LRCK or BICK pin)
0
“L”
GND
Input
(1fs)
EXT Slave Mode
0
“L”
Selected by
FS3-0 bits
Input
(1fs)
EXT Master Mode
0
“L”
Selected by
FS1-0 bits
Output
(1fs)
Note 33. When PMVCM bit = M/S bit = “1” and MCKI is input, LRCK and BICK are output, even if PMDAC bit =
PMADL bit = PMADR bit = “0”.
Table 2. Clock pins state in Clock Mode
■
Master Mode/Slave Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4646 is power-down mode (PDN pin = “L”) and exits reset state, the AK4646 is slave mode. After exiting reset state,
the AK4646 goes to master mode by changing M/S bit = “1”.
When the AK4646 is on the master mode, LRCK and BICK pins are a floating state until M/S bit becomes “1”. LRCK and
BICK pins of the AK4646 should be pulled-down or pulled-up by the resistor (about 100k
Ω
) externally to avoid the
floating state.
M/S bit
Mode
0
Slave Mode
1
Master Mode
Table 3. Select Master/Slave Mode
(default)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4646 | Stereo CODEC with MIC/SPK-AMP |
| AK4646EN | Stereo CODEC with MIC/SPK-AMP |
| AK4647 | Stereo CODEC with MIC/HP-AMP |
| AK4647VN | Stereo CODEC with MIC/HP-AMP |
| AK4648 | Stereo CODEC with MIC/HP/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4647 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
| AK4647VN | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
| AK4647VQ | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
| AK4648 | 制造商:AKM 制造商全稱:AKM 功能描述:stereo CODEC with MIC/HP/SPK amplifier |
| AK4648EC | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP/SPK-AMP |
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