- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385093 > AK4643EN (Asahi Kasei Microsystems Co.,Ltd) Stereo CODEC with MIC/HP/RCV/SPK-AMP PDF資料下載
參數(shù)資料
| 型號： | AK4643EN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Stereo CODEC with MIC/HP/RCV/SPK-AMP |
| 中文描述： | 立體聲編解碼器麥克風/惠普/垃圾車/胰腎聯(lián)合移植腺苷 |
| 文件頁數(shù)： | 26/104頁 |
| 文件大小： | 926K |
| 代理商： | AK4643EN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁
ASAHI KASEI
[AK4643]
MS0476-E-01
2006/10
- 26 -
PLL Mode (AIN3 bit = “0”, PMPLL bit = “1”)
When PMPLL bit is “1”, a fully integrated analog phase locked loop (PLL) generates a clock that is selected by the
PLL3-0 and FS3-0 bits. The PLL lock time is shown in Table 5, whenever the AK4643 is supplied to a stable clocks after
PLL is powered-up (PMPLL bit = “0”
→
“1”) or sampling frequency changes. When AIN3 bit = “1”, the PLL is not
available.
1) Setting of PLL Mode
R and C of
VCOC pin
R[
]
6.8k
-
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
Mode
PLL3
bit
PLL2
bit
PLL1
bit
PLL0
bit
PLL Reference
Clock Input Pin
Input
Frequency
C[F]
220n
-
4.7n
10n
4.7n
10n
4.7n
4.7n
4.7n
4.7n
10n
10n
PLL Lock
Time
(max)
160ms
-
2ms
4ms
2ms
4ms
40ms
40ms
40ms
40ms
40ms
40ms
0
1
2
3
4
5
6
7
12
13
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
0
1
0
1
LRCK pin
N/A
BICK pin
BICK pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
MCKI pin
N/A
1fs
-
32fs
64fs
Default
11.2896MHz
12.288MHz
12MHz
24MHz
13.5MHz
27MHz
Others
Others
Table 5. Setting of PLL Mode (*fs: Sampling Frequency)
2) Setting of sampling frequency in PLL Mode
When PLL reference clock input is MCKI pin, the sampling frequency is selected by FS3-0 bits as defined in Table 6.
Mode
FS3 bit
FS2 bit
FS1 bit
0
0
0
0
1
0
0
0
2
0
0
1
3
0
0
1
4
0
1
0
5
0
1
0
6
0
1
1
7
0
1
1
10
1
0
1
11
1
0
1
14
1
1
1
15
1
1
1
Others
Others
Table 6. Setting of Sampling Frequency at PMPLL bit = “1” (Reference Clock = MCKI pin)
When PLL reference clock input is LRCK or BICK pin, the sampling frequency is selected by FS3 and FS1-0 bits. (See
Table 7)
FS2 bit is “don’t care”.
Mode
FS3 bit
FS2 bit
FS1 bit
FS0 bit
0
0
Don’t care
0
1
0
Don’t care
0
2
0
Don’t care
1
3
0
Don’t care
1
6
1
Don’t care
1
7
1
Don’t care
1
Others
Others
Table 7. Setting of Sampling Frequency at PMPLL bit = “1” (Reference Clock = LRCK or BICK pin)
FS0 bit
0
1
0
1
0
1
0
1
0
1
0
1
Sampling Frequency
8kHz
12kHz
16kHz
24kHz
7.35kHz
11.025kHz
14.7kHz
22.05kHz
32kHz
48kHz
29.4kHz
44.1kHz
N/A
Default
Sampling Frequency Range
7.35kHz
≤
fs
≤
8kHz
8kHz < fs
≤
12kHz
12kHz < fs
≤
16kHz
16kHz < fs
≤
24kHz
24kHz < fs
≤
32kHz
32kHz < fs
≤
48kHz
N/A
0
1
0
1
0
1
Default
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4645EZ | Stereo CODEC with MIC/HP-AMP |
| AK4645 | Stereo CODEC with MIC/HP-AMP |
| AK4646EZ | Stereo CODEC with MIC/SPK-AMP |
| AK4646 | Stereo CODEC with MIC/SPK-AMP |
| AK4646EN | Stereo CODEC with MIC/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4644 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with built-in MIC/HP/RCV amplifier |
| AK4644EN | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP/RCV-AMP |
| AK4645 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
| AK4645EN | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/HP-AMP |
| AK4645ENP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。