參數(shù)資料
型號(hào): AK4632VN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16-Bit ツヒ Mono CODEC with ALC & MIC/SPK/Video-AMP
中文描述: 16位ツヒALC的單聲道編解碼器
文件頁(yè)數(shù): 62/70頁(yè)
文件大小: 639K
代理商: AK4632VN
ASAHI KASEI
[AK4632]
MS0396-E-00
2005/06
- 62 -
Speaker-amp Output
FS2-0 bits
(Addr:05H,
D5, D2-0)
DVOL7-0 bits
(Addr:0AH, D7-0)
PMDAC bit
(Addr:00H, D2)
PMSPK bit
(Addr:00H, D4)
XXXX
XXXX
0001100
XXXXXXX
SPP pin
Normal Output
SPPS bit
(Addr:02H, D7)
Hi-Z
Hi-Z
SPN pin
Normal Output
Hi-Z
Hi-Z
SVDD/2
SVDD/2
(1)
(4)
X
0
(3)
ALC2 bit
(Addr:07H, D6)
(5)
(6)
(9)
(7)
(2)
DACM bit
(Addr:02H, D3)
ALC2S bit
(Addr:02H, D5)
(8)
Example:
PLL, Master Mode
Audio I/F Format :DSP Mode, BCKP=MSBS= “0”
Sampling Frequency: 8kHz
Digital Volume: -8dB
ALC2 : Enable
(2) Addr:02H, Data:28H
(3) Addr:07H, Data:40H
(1) Addr:05H, Data:00H
(4) Addr:0AH, Data:28H
(5) Addr:00H, Data:54H
(6) Addr:02H, Data:A8H
(7) Addr:02H, Data:28H
Playback
(8) Addr:00H, Data:40H
Figure 51. Speaker-Amp Output Sequence
<Example>
At first, clocks should be supplied according to
Clock Set Up
sequence.
(1) Set up a sampling frequency (FS3-0 bits). When the AK4632 is PLL mode, DAC and Speaker-Amp should be
powered-up in consideration of PLL lock time after a sampling frequency is changed.
(2) Set up the path of
DAC
SPK-Amp
DACM = ALC2S bit:
0
1
(3) Set up the ALC2 Enable/Disable
(4) Set up the digital volume (Addr: 0AH)
After DAC is powered-up, the digital volume changes from default value (0dB) to the register setting value by
the soft transition.
(5) Power Up of DAC and Speaker-Amp: PMDAC bit = PMSPK bit =
0
1
When ALC2 bit =
1
, the ALC2 is disabled (ALC2 gain is fiexed to
–2dB
) during the initilization cycle
(512/fs = 64ms @ fs=8kHz, ROTM bit =
0
) and the ALC2 starts from
–2dB
after completing the
initilization cycle.
(6) Exit the power-save-mode of Speaker-Amp: SPPS bit =
0
1
(6)
time depends on the time constant of input impedance of MIN pin and capacitor between MIN pin and
MOUT pin. If Speaker-Amp output is enabled before MIN-Amp (ALC2) becomes stable, pop noise may occur.
e.g. Input Impedance of MIN pin =36k
(max), C=0.1
μ
F: Recommended wait time is more than 5
τ
= 18ms.
(7) Enter the power-save-mode of Speaker-Amp: SPPS bit =
1
0
(8) Disable the path of
DAC
SPK-Amp
DACM = ALC2S bit:
1
0
(9) Power Down DAC and Speaker-Amp: PMDAC bit = PMSPK bit =
1
0
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