參數(shù)資料
型號(hào)： AK4632VN
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： 16-Bit ツヒ Mono CODEC with ALC & MIC/SPK/Video-AMP
中文描述： 16位ツヒALC的單聲道編解碼器
文件頁(yè)數(shù)： 23/70頁(yè)
文件大?。?/td> 639K
代理商： AK4632VN
ASAHI KASEI
[AK4632]
MS0396-E-00
2005/06
- 23 -
When PLL2 bit is
“
0
”
(PLL reference clock input is FCK or BICK pin), the sampling frequency is selected by FS3,
FS1-0 bits. (See Table 6)
Mode
FS3 bit
FS2 bit
FS1 bit
FS0 bit
0
0
Don’t care
0
1
0
Don’t care
0
2
0
Don’t care
1
3
0
Don’t care
1
6
1
Don’t care
1
7
1
Don’t care
1
Others
Others
Table 6. Setting of Sampling Frequency at PLL2 bit =
“
0
”
and PMPLL bit =
“
1
”
Sampling Frequency Range
7.35kHz
≤
fs
≤
8kHz
8kHz < fs
≤
12kHz
12kHz < fs
≤
16kHz
16kHz < fs
≤
24kHz
24kHz < fs
≤
32kHz
32kHz < fs
≤
48kHz
N/A
0
1
0
1
0
1
Default
PLL Unlock State
1) PLL Master Mode (PMPLL bit =
“
1
”
, M/S bit =
“
1
”
)
In this mode, irregular frequency clocks are output from FCK, BICK and MCKO pins after PMPLL bit =
“
0
”
“
1
”
or
sampling frequency is changed. After that PLL is unlocked, BICK and FCK pins output
“
L
”
for a moment, and invalid
frequency clock is output from MCKO pin at MCKO bit =
“
1
”
. If MCKO bit is
“
0
”
, MCKO pin is output to
“
L
”
. (See
Table 7)
After the PLL is locked, a first period of FCK and BICK may be invalid clock, but these clocks return to normal state after
a period of 1/fs.
MCKO pin
PLL State
MCKO bit =
“
0
”
MCKO bit =
“
1
”
After that PMPLL bit
“
0
”
“
1
”
“
L
”
Output
PLL Unlock
“
L
”
Output
PLL Lock
“
L
”
Output
256fs Output
Table 7. Clock Operation at PLL Master Mode (PMPLL bit =
“
1
”
, M/S bit =
“
1
”
)
2) PLL Slave Mode (PMPLL bit =
“
1
”
, M/S bit =
“
0
”
)
In this mode, an invalid clock is output from MCKO pin after PMPLL bit =
“
0
”
“
1
”
or sampling frequency is changed.
After that, 256fs is output from MCKO pin when PLL is locked. ADC and DAC output invalid data when the PLL is
unlocked. For DAC, the output signal should be muted by writing
“
0
”
to DACA and DACM bits in Addr=02H.
BICK pin
FCK pin
Invalid
Invalid
Invalid
“
L
”
Output
See Table 9
Invalid
“
L
”
Output
1fs Output
MCKO pin
PLL State
MCKO bit =
“
0
”
“
L
”
Output
“
L
”
Output
“
L
”
Output
MCKO bit =
“
1
”
Invalid
Invalid
256fs Output
After that PMPLL bit
“
0
”
“
1
”
PLL Unlock
PLL Lock
Table 8. Clock Operation at PLL Slave Mode (PMPLL bit =
“
1
”
, M/S bit =
“
0
”
)
相關(guān)PDF資料
PDF描述
AK4633VN 16bit mono CODEC with MIC/SPK amplifier.
AK4633 16-Bit Mono CODEC with ALC & MIC/SPK-AMP
AK4640 16BIT CODEC WITH MIC /HP/SPK-AMPl
AK4640VG 16BIT CODEC WITH MIC /HP/SPK-AMPl
AK4640VN 16BIT CODEC WITH MIC /HP/SPK-AMPl
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4633 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK-AMP
AK4633ENP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:LOW COST MONO CODEC WITH SPK A
AK4633VN 制造商:AKM 制造商全稱:AKM 功能描述:16bit mono CODEC with MIC/SPK amplifier.
AK4633VNP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:LOW COST MONO CODEC WITH SPK A
AK4634 制造商:AKM 制造商全稱:AKM 功能描述:16-Bit Mono CODEC with ALC & MIC/SPK-AMP
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