參數(shù)資料
型號: AK4584VQ
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 24Bit 96kHz Audio CODEC with DIT/DIR
中文描述: 24位96kHz的音頻編解碼器與動態(tài)網(wǎng)/迪爾
文件頁數(shù): 32/53頁
文件大?。?/td> 351K
代理商: AK4584VQ
ASAHI KASEI
[AK
4584]
MS0118-E-00
2001/11
- 32 -
Master Mode and Slave Mode
The M/S pin selects between master and slave modes. M/S pin = “H” is master mode, M/S pin = “L” is slave mode. In
master mode, MCKO, BICK and LRCK are output. In slave mode, only MCKO is output from the AK4584 and dividing
MCKO externally provides BICK and LRCK.
MCKO1/2
MCKO1 = Output
MCKO2 = Output
MCKO1 = Output
MCKO2 = Output
Table 17. Master mode/Slave mode
BICK, LRCK
BICK = Input
LRCK = Input
BICK = Output
LRCK = Output
Slave Mode
Master Mode
Relationship Clock operation and Power down
When the AK4584 is powered down, the XTALE pin controls the master clock output. The DMCK pin disables the
MCKO1 output.
PDN pin
M/S pin
XTALE pin
CM1-0 bit
MCKO1/2
MCKO1 = L
MCKO2 = L
MCKO1 = Output
1)
MCKO2 = Output
1)
MCKO1 = L
MCKO2 = L
MCKO1 = Output
1)
MCKO2 = Output
1)
BICK, LRCK
DIR, DIT, CODEC
L
L
H
BICK = Input
LRCK = Input
Power Down
L
L
H
H
Default
Fixed to
“01”
BICK = L
LRCK = L
Power Down
L
BICK = Input
LRCK = Input
BICK = Output
LRCK = Output
H
H
Don’t Care
Available
MCKO1 = Output
2)
MCKO2 = Output
2)
Normal Operation
Table 18. Clock Operation
Note 1) : Since the DIR is powered down, a X’tal oscillator or the external clock can be selected for the clock source.
Note 2) : CM1-0 bits select the clock source. When changing between modes, there is a possibility
that the master clock output (MCKO) stops momentarily.
Note 3) : When PDN pin = “L”, XTI pin is fixed to “L” when XTALE pin = “L” and the external clock is not AC coupled.
Digital High Pass Filter
The ADC has a digital high-pass filter for DC offset cancellation. The cut-off frequency of the HPF is 0.9Hz at fs =
44.1kHz and also scales with sampling rate (fs).
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