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參數(shù)資料
| 型號： | AK4561VQ |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16bit CODEC with built-in ALC and MIC/HP-Amp |
| 中文描述： | 16位編解碼器在ALC和內(nèi)置麥克風(fēng)/惠普放大器 |
| 文件頁數(shù)： | 32/48頁 |
| 文件大?。?/td> | 332K |
| 代理商： | AK4561VQ |
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ASAHI KASEI
AKM CONFIDENTIAL
[AK4561]
Rev. 0.9
2000/09
- 32 -
n
BEEP Input
When S9 bit is “1”, input signal from BEEP pin can be output from MOUT pin. Normally, BEEP pin is connected with
AC coupling.
Input impedance of BEEP pin is typically 50k
and centered around VCOM voltage. Maximum input voltage to BEEP
pin is –5.5dBV.
n
Analog Volume (OPGA)
The AK4561 includes the 0dB
～
-50dB & MUTE analog volume with zero crossing detection for headphone and speaker.
Zero crossing is detected on L/R channels independently. Zero crossing timeout (To) is 16ms.
These periods are value at fs=32kHz (FS bit = “0”) or fs=48kHz (FS bit = “1”).
OPGA is not written during counting zero crossing timers. In case of writing control register continually, the change of
OPGA should be written after zero crossing timeout and over. If OPGA is changed by writing to control register before
zero crossing detection, OPGA value of L/R channels may not give a difference level.
In case of writing to the control register continually, the control register should be written by an interval more than zero
crossing timeout. If an appointed interval is written, there is possible to the different value the IPGA value of L/R
channels.
Usually, to remove the offset of DAC, it needs a capacitor (Ca) between LOUT2/ROUT2 and OPGL/OPGR. The cut-off
frequency is decided by capacity of Ca and input impedance (typ. 110k
) of OPGL/OPGR.
Power supply for analog volume enables when PM6 or PM5 bits is “1”.
The initial value is 0dB at exiting power-down.
Figure 14. Connect LOUT2/ROUT2 with OPGL/OPGR
n
LINE input
In case of LINE input, input impedance of LIN/RIN is 184k
(typ.) and centered around the VCOM voltage. When input
voltage is +2dBV, LIN/RIN pins should be input to –5.5dBV@VA=2.8V and less after dividing resistors externally.
When S2 bit is “1”, LINE input is selected. Then IPGA table of ALC is changed to LINE side.
Figure 15. Example of LINEIN at VA=2.8V
OPGA
LOUT2/ROUT2
Ca
typ.110k
OPGL/OPGR
ALC
Line Input
typ.184k
LIN/RIN
22k
27k
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4562 | LOW POWER 20BIT CODEC WITH PGA |
| AK4562VN | LOW POWER 20BIT CODEC WITH PGA |
| AK4563A | Low Power 16bit 4ch ADC & 2ch DAC with ALC |
| AK4563AVF | Low Power 16bit 4ch ADC & 2ch DAC with ALC |
| AK4564 | 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4562 | 制造商:AKM 制造商全稱:AKM 功能描述:EVALUATION BOARD REV.A FOR AK4562 |
| AK4562VN | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 20BIT CODEC WITH PGA |
| AK4563A | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 16bit 4ch ADC & 2ch DAC with ALC |
| AK4563AVF | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 16bit 4ch ADC & 2ch DAC with ALC |
| AK4564 | 制造商:AKM 制造商全稱:AKM 功能描述:16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP |
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