參數(shù)資料
型號(hào)： AK4560AVQ
廠(chǎng)商： Asahi Kasei Microsystems Co.,Ltd
元件分類(lèi)： Codec
英文描述： 16bit CODEC with ALC and MIC/HP/SPK-Amps
中文描述： 16位編解碼器ALC和麥克風(fēng)/惠普/胰腎聯(lián)合移植，放大器
文件頁(yè)數(shù)： 23/47頁(yè)
文件大?。?/td> 339K
代理商： AK4560AVQ
ASAHI KASEI
[AK4560A]
MS0028-E-00
2000/05
- 23 -
ALC
Mode
Control
1
Addr
05H
ALC Mode Control 1
R/W
RESET
LMTH: ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
The ALC1 limiter detection level and the ALC1 recovery counter reset level are of uneven quality
about
±
2dB.
LMTH
ALC1 Limiter Detection Level
ALC1 Recovery Waiting Counter Reset Level
0
ADC Input
≥
-6.0dB
1
ADC Input
≥
-4.0dB
Table 9. ALC1 Limiter Detection Level / Recovery Waiting Counter Reset Level
Register Name
D7
0
D6
0
D5
D4
D3
D2
D1
D0
ZELM
LMAT1
LMAT0
R/W
FDATT
RATT
LMTH
0
0
0
0
0
0
0
0
-6.0dB > ADC Input
≥
-8.0dB
-4.0dB >ADC Input
≥
-6.0dB
RESET
RATT: ALC1 Recovery GAIN Step
During the ALC1 Recovery operation, the number of steps changed from current IPGA value is
set. For example, when the current IPGA value is 30H, RATT = “1” is set, IPGA changes to 32H
by the ALC1 recovery operation, the input signal level is gained by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0), the IPGA value does not increase.
RATT
GAIN STEP
0
1
1
2
Table 10. ALC1 Recovery GAIN Step Setting
RESET
FDATT: FADEIN/OUT ATT Step
During the FADEIN/OUT operation, the number of steps changed from current IPGA value is
set. For example, when the current IPGA value is 30H, FDATT = “1” is set, IPGA changes to
32H(at FADEIN operation) or 2EH (at FADEOUT operation) by the FADEIN/OUT operation,
the input signal level is changed by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0), the IPGA value does not increase.
FDATT
ATT STEP
0
1
1
2
Table 11. FADEIN/OUT ATT Step Setting
RESET
LMAT1-0: ALC1 Limiter ATT Step
During the ALC1 limiter operation, when either Lch or Rch exceeds the ALC1 limiter detection
level set by LMTH, the number of steps attenuated from current IPGA value is set. For example,
when the current IPGA value is 68H in the state of LMAT1-0 bit = “11”, it becomes IPGA = 64H
by the ALC1 limiter operation, the input signal level is attenuated by 2dB (=0.5dB x 4).
When the attenuation value exceeds IPGA = “00” (MUTE), it clips to “00”.
LMAT1
LMAT0
ATT STEP
0
0
0
1
1
0
1
1
Table 12. ALC1 Limiter ATT Step Setting
1
2
3
4
RESET
ZELM: Enable zero crossing detection at ALC1 Limiter operation
0: Enable (RESET)
1: Disable
In case of ZELM = “0”, IPGA of each L/R channel do zero crossing or timeout independently, the IPGA
value is changed by ALC1 operation. Zero crossing timeout is the same as ALC1 recovery operation. In case
of ZELM = “1”, the IPGA value is changed immediately.
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