參數(shù)資料
型號: AK4533
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: Audio Codec with Touch Screen Controller
中文描述: 音頻編解碼器與觸摸屏控制器
文件頁數(shù): 24/40頁
文件大?。?/td> 473K
代理商: AK4533
[ASAHI KASEI]
<Revision 0.9a>
July 00
23
Addr = 04h
When the Mute bit is set to "1", input data to D/A converter is forced to set to zero regardless of D/A data from SDI pin. When the
Mute bit is set to "0", D/A data is enabled. When reset, default value of Mute bit is "0".
Mute
Mute Control
Addr = 04h
These bits control the attenuation level of DAC output. Step size of ATT is approximately 1.5dB. This value is still preserved even if
DALPD bit and/or DARPD bit are set and/or reset.
M3-0:
Digital ATT Output Control
DATA (HEX)
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
DATT (dB)
0
1.48
2.95
4.43
6.02
7.5
8.97
10.45
12.04
13.52
14.99
16.47
18.06
19.54
21.01
22.49
STEP
default
1.5dB
Figure 13
describes the recovery operation.
Limit
Operation
Recovery Operation
Inhibited State
Recovery
Ready
Recovery Operation
Inhibited State
Zero-Cross
IPGA
Ready t Update
Recovery
Ready
Recovery Operation Cycle
Timeout
IPGA=2F
IPGA=30
IPGA=31
Recovery
Ready
Recovery
Inhibited
IPGA value
Recovery Operation Cycle
Recovery Operation Cycle
Figure 13. The Flow of Recovery Operation
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