參數(shù)資料
型號: AK4529
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: High Performance Multi-channel Audio CODEC
中文描述: 高性能多通道音頻解碼器
文件頁數(shù): 20/38頁
文件大?。?/td> 398K
代理商: AK4529
ASAHI KASEI
[AK4529]
MS0082-E-00
2001/3
- 20 -
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Overflow Detection
The AK4529 has overflow detect function for analog input. Overflow detect function is enable if OVFE bit is set to “1” at
serial control mode. OVF pin goes to “H” if analog input of Lch or Rch overflows (more than -0.3dBFS). OVF output for
overflowed analog input has the same group delay as ADC (GD = 27.6/fs = 626μs@fs=44.1kHz). OVF is “L” for 522/fs
(=11.8ms @fs=44.1kHz) after PDN = “
”, and then overflow detection is enabled.
n
Zero Detection
The AK4529 has two pins for zero detect flag outputs. Channel grouping can be selected by DZFM3-0 bits if P/S = “L”
and DZFE = “L” (table 9). DZF1 pin corresponds to the group 1 channels and DZF2 pin corresponds to the group 2
channels. However DZF2 pin becomes OVF pin if OVFE bit is set to “1”. Zero detection mode is set to mode 0 if DZFE=
“H” regardless of P/S pin. DZF1 is AND of all eight channels and DZF2 is disabled (“L”) at mode 0. Table 10 shows the
relation of P/S, DZFE, OVFE and DZF.
When the input data of all channels in the group 1(group 2) are continuously zeros for 8192 LRCK cycles, DZF1(DZF2)
pin goes to “H”. DZF1(DZF2) pin immediately goes to “L” if input data of any channels in the group 1(group 2) is not
zero after going DZF1(DZF2) “H”.
DZFM
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
AOUT
Mode
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
L1
R1
L2
R2
L3
R3
L4
R4
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF2
DZF1
DZF1
DZF1
DZF1
DZF1
DZF2
DZF2
DZF1
DZF1
DZF1
DZF1
DZF2
DZF2
DZF2
DZF1
DZF1
DZF1
DZF2
DZF2
DZF2
DZF2
DZF1
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
disable (DZF1=DZF2 = “L”)
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF2
DZF2
DZF2
disable (DZF1=DZF2 = “L”)
Default
Table 9. Zero detect control
P/S pin
DZFE pin
“L”
“H”
“L”
OVFE bit
disable
disable
“0”
“1”
“0”
“1”
DZF mode
Mode 7
Mode 0
Selectable
Selectable
Mode 0
Mode 0
DZF1 pin
“L”
AND of 6ch
Selectable
Selectable
AND of 6ch
AND of 6ch
DZF2/OVF pin
“L”
“L”
Selectable
OVF output
“L”
OVF output
“H” (parallel mode)
“L” (serial mode)
“H”
Table 10. DZF1-2 pins outputs
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