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參數(shù)資料
| 型號： | AK4396VF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Advanced Multi-Bit 192kHz 24-Bit ツヒ DAC |
| 中文描述： | 先進的多位192kHz的24位數(shù)模轉換器ツヒ |
| 文件頁數(shù)： | 20/38頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AK4396VF |
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ASAHI KASEI
[AK4396]
MS0336-E-00
2004/08
- 20 -
2. Auto Setting Mode (ACKS bit = “1”)
MCLK frequency and the sampling speed are detected automatically (Table 8) and DFS1-0 bits are ignored. The MCLK
frequency corresponding to each sampling speed should be provided (Table 9).
MCLK
1152fs
512fs
768fs
256fs
384fs
128fs
192fs
Table 8. Sampling Speed (Auto Setting Mode @Serial Mode)
LRCK
MCLK (MHz)
fs
128fs
192fs
256fs
384fs
32.0kHz
N/A
N/A
N/A
N/A
44.1kHz
N/A
N/A
N/A
N/A
48.0kHz
N/A
N/A
N/A
N/A
88.2kHz
N/A
N/A
22.5792
33.8688
96.0kHz
N/A
N/A
24.5760
36.8640
176.4kHz
22.5792
33.8688
N/A
N/A
192.0kHz
24.5760
36.8640
N/A
N/A
Table 9. System Clock Example (Auto Setting Mode @Serial Mode)
[2] DSD Mode
The external clocks, which are required to operate the AK4396, are MCLK and DCLK. MCLK should be synchronized
with DCLK but the phase is not critical. The frequency of MCLK is set by DCKS bit.
All external clocks (MCLK, DCLK) should always be present whenever the AK4396 is in the normal operation mode
(PDN pin = “H”). If these clocks are not provided, the AK4396 may draw excess current because the device utilizes
dynamic refreshed logic internally. The AK4396 should be reset by PDN pin = “L” after threse clocks are provided. If the
external clocks are not present, the AK4396 should be in the power-down mode (PDN pin = “L”). After exiting
reset(PDN pin = “L”
→
“H”) at power-up etc., the AK4396 is in the power-down mode until MCLK is input.
DCKS bit
MCLK Frequency
0
512fs
1
768fs
Table 10. System Clock (DSD Mode)
Sampling Speed
Normal (fs
≤
32kHz)
Normal
Double
Quad
512fs
16.3840
22.5792
24.5760
N/A
N/A
N/A
N/A
768fs
24.5760
33.8688
36.8640
N/A
N/A
N/A
N/A
1152fs
36.8640
N/A
N/A
N/A
N/A
N/A
N/A
Sampling
Speed
Normal
Double
Quad
DCLK Frequency
64fs
64fs
Default
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相關代理商/技術參數(shù) |
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| AK4396VFP-E2 | 功能描述:IC DAC 24BIT STEREO 28VSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產品目錄頁面:1398 (CN2011-ZH PDF) |
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| AK4397EQ | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance Premium 32-Bit DAC |
| AK4399 | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 123dB Premium 32-Bit DAC |
| AK4399EQ | 制造商:AKM 制造商全稱:AKM 功能描述:High Performance 123dB Premium 32-Bit DAC |
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