參數(shù)資料
型號(hào)： AK4370
廠商： Asahi Kasei Microsystems Co.,Ltd
英文描述： 24-Bit 2ch DAC with HP-AMP & Output Mixer
中文描述： 24位2通道DAC，具有惠普腺苷
文件頁(yè)數(shù)： 33/49頁(yè)
文件大?。?/td> 695K
代理商： AK4370
ASAHI KASEI
[AK4370]
MS0595-E-00
2007/03
- 33 -
4) LIN1/RIN1/LIN2/RIN2
→
Lineout
Power Supply
PDN pin
PMVCM bit
LMUTE,
ATTS3-0 bits
10H(MUTE)
0FH(0dB)
LIN1/RIN1/
LIN2/RIN2 pins
(4)
(Hi-Z)
(Hi-Z)
PMLO bit
Don’t care
(1) >150ns
(2) >0s
LIN1L, RIN1R,
LIN2L, RIN2R bits
(3) >0s
(5) >2ms
(5) >2ms
LOUT/ROUT pins
(6)
(Hi-Z)
(Hi-Z)
(6)
(6)
Figure 27. Power-up/down sequence of LIN1/RIN1/LIN2/RIN2 and Lineout
(1)
When AVDD and DVDD are supplied separately, AVDD should be powered-up after DVDD rises up to 1.6V or
more. When AVDD and HVDD are supplied separately, AVDD should be powered-up at the same time or earlier
than HVDD. PDN pin should be set to “H” at least 150ns after power is supplied. MCKI, BICK and LRCK can be
stopped when DAC is not used.
(2)
PMVCM bit should be changed to “1” after PDN pin goes “H”.
(3)
LIN1L, LIN2L, RIN1R and RIN2R bits should be changed to “1” after PMVCM bit is changed to “1”.
(4)
When LIN1L, LIN2L, RIN1R or RIN2R bit is changed to “1”, LIN1, RIN1, LIN2 or RIN2 pin is biased to 0.475 x
AVDD.
(5)
PMLO bit should be changed to “1” at least 2ms (in case external capacitance at VCOM pin is 2.2
μ
F) after LIN1L,
LIN2L, RIN1R and RIN2R bits are changed to “1”.
(6) When the PMLO bit is changed, pop noise is output from LOUT/ROUT pins.
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