參數(shù)資料
型號: AK4366
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: Low Power 24-Bit 2ch DAC with HP-AMP
中文描述: 低功耗24位2通道DAC,具有惠普腺苷
文件頁數(shù): 22/31頁
文件大小: 266K
代理商: AK4366
ASAHI KASEI
AKM CONFIDENTIAL
[AK4366]
REV 0.6
2003/3
- 22 -
2) Serial mode (P/S= “L”)
Power Supply
PDN pin
PMVCM bit
Clock Input
(3)
SDTI pin
PMDAC bit
DAC Internal
State
PD
Normal Operation
HPL/R pin
PMHPL,
PMHPR bit
(6)
ATTL7-0
ATTR7-0 bit
00H(MUTE)
FFH(0dB)
(9) 1061/fs
(8) GD
PD
Normal Operation
00H(MUTE)
FFH(0dB)
(8)
(9)
(6)
(7)
(8) (9)
Don’t care
Don’t care
(7)
(8) (9)
00H(MUTE)
Don’t care
(9)
Don’t care
(1)
>150ns
(2) >0
PD
(5) >2ms
MUTEN bit
DACL, DACR bit
(4) >0
(4) >0
(5) >2ms
Figure 17. Power-up/down sequence of DAC and HP-amp
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) PMVCM and PMDAC bits should be changed to “1” after PDN pin goes to “H”.
(3) External clocks (MCLK, BICK, LRCK) are needed to operate DAC. When PMDAC= “0”, these clocks can be
stopped. Headphone amp can operate without these clocks.
(4) DACL and DACR bits should be changed to “1” after PMDAC bit is changed to “1”.
(5) PMHPL, PMHPR and MUTEN bits should be changed to “1” at least 2ms after DACL and DACR bits are changed to
“1”.
(6) Rise time of headphone amp is determined by external capacitor (C) of MUTET pin. Time constant is 100k x C. When
C=1μF, time constant is 100ms.
(7) Fall time of headphone amp is determined by external capacitor (C) of MUTET pin. Time constant is 100k x C. When
C=1μF, time constant is 100ms.
PMHPL, PMHPR, DACL and DACR bits should be changed to “0” after HPL and HPR pins go to VSS.
(8) Analog output corresponding to digital input has the group delay (GD) of 20.8/fs(=472μs@fs=44.1kHz).
(9) ATS bit sets transition time of digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
(10) Power supply should be switched off after headphone amp is powered down (HPL/R pins become “L”).
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