參數(shù)資料
型號(hào)： AK4359VF
廠(chǎng)商： ASAHI KASEI POWER DEVICES CORP
元件分類(lèi)： DAC
英文描述： 192 KHZ 24 BIT 8CH DAC
中文描述： SERIAL INPUT LOADING, 24-BIT DAC, PDSO30
封裝： LEAD FREE, PLASTIC, VSOP-30
文件頁(yè)數(shù)： 19/32頁(yè)
文件大小： 369K
代理商： AK4359VF
ASAHI KASEI
[AK4359]
MS0289-E-00
2004/02
- 19 -
Soft Mute Operation
Soft mute operation is performed at digital domain. When the SMUTE bit goes to “1”, the output signal is attenuated by
-
∞
during ATT_DATA
×
ATT transition time (Table 12) from the current ATT level. When the SMUTE bit is returned to
“0”, the mute is cancelled and the output attenuation gradually changes to the ATT level during ATT_DATA
×
ATT
transition time. If the soft mute is cancelled before attenuating to -
∞
after starting the operation, the attenuation is
discontinued and returned to ATT level by the same cycle. The soft mute is effective for changing the signal source
without stopping the signal transmission.
SMUTE
Attenuation
DZF pin
ATT Level
-
∞
AOUT
8192/fs
GD
(2)
GD
(1)
(3)
(4)
(1)
Notes:
(1) ATT_DATA
×
ATT transition time (Table 12). For example, in Normal Speed Mode, this time is 1020LRCK cycles
(1020/fs) at ATT_DATA=255.
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to -
∞
after starting the operation, the attenuation is discontinued and
returned to ATT level by the same cycle.
(4) When the input data at each channel is continuously zeros for 8192 LRCK cycles, DZF pin of each channel goes to
“H”. DZF pin immediately goes to “L” if input data are not zero after going DZF “H”.
Figure 11. Soft Mute and Zero Detection (DZFB bit = “0”)
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