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參數(shù)資料
| 型號： | AK4340_06 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24-Bit Stereo ツヒ DAC with 2Vrms Output |
| 中文描述： | 192kHz的24位立體聲ツヒDAC，具有2Vrms的輸出 |
| 文件頁數(shù)： | 20/23頁 |
| 文件大?。?/td> | 259K |
| 代理商： | AK4340_06 |
ASAHI KASEI
[AK4340]
MS0501-E-00
2006/04
- 20 -
SYSTEM DESIGN
Figure 15and Figure 16 show the system connection diagram. An evaluation board (AKD4340) is available in order to
allow an easy study on the layout of a surround circuit.
MCLK
1
BICK
2
SDTI
3
LRCK
4
PDN
5
CSN
6
CCLK
7
CDTI
8
GAIN
16
P/S
15
VDD
14
VSS
13
HVEE
12
AOUTL
11
AOUTR
10
NC
9
Master Clock
μ
P
AK4340
fs
24bit Audio Data
Reset & Power down
64fs
10u
0.1u
+
Rch Out
Lch Out
Analog Ground
Digital Ground
+5V Analog Supply
+
10u
0.1u
Negative Analog Supply
Figure 15. Typical Connection Diagram (Serial Control Mode, GAIN=0dB)
MCLK
1
BICK
2
SDTI
3
LRCK
4
PDN
5
SMUTE
6
ACKS
7
DIF0
8
GAIN
16
P/S
15
VDD
14
VSS
13
HVEE
12
AOUTL
11
AOUTR
10
NC
9
Master Clock
Mode
Setting
AK4340
fs
24bit Audio Data
Reset & Power down
64fs
10u
0.1u
+
Rch Out
Lch Out
Analog Ground
Digital Ground
+5V Analog Supply
+
10u
0.1u
Negative Analog Supply
Figure 16. Typical Connection Diagram (Parallel Control Mode, GAIN=0dB)
Notes:
- LRCK = fs, BICK = 64fs.
- When AOUT drives some capacitive load, some resistor should be added in series between AOUT and capacitive
load.
- All input pins except for pull-up pin must not be left floating.
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