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參數(shù)資料
| 型號： | AK4340_06 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 192kHz 24-Bit Stereo ツヒ DAC with 2Vrms Output |
| 中文描述： | 192kHz的24位立體聲ツヒDAC，具有2Vrms的輸出 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大小： | 259K |
| 代理商： | AK4340_06 |
ASAHI KASEI
[AK4340]
MS0501-E-00
2006/04
- 14 -
Output Gain Setting
Outputs level of AOUTL/AOUTR pin can be selected by GAIN pin.
GAIN pin
GAIN
0dB
+1.94dB
Output Level (VDD=5V)
2Vrms (typ)
2.5Vrms (typ)
L
H
Figure 10. Output Level Setting
Soft Mute Operation
Soft mute operation is performed in digital domain. When the SMUTE bit (SMUTE pin) goes to “1”(“H”), the output
signal is attenuated by -
∞
during ATT_DATA
×
ATT transition time (Table 8) from the current ATT level. When the
SMUTE bit (SMUTE pin) is returned to “0” (“L”), the mute is cancelled and the output attenuation gradually changes to
the ATT level during ATT_DATA
×
ATT transition time. If the soft mute is cancelled before attenuating to -
∞
after
starting the operation, the attenuation is discontinued and returned to ATT level by the same cycle. The soft mute is
effective for changing the signal source without stopping the signal transmission.
SMUTE bit or
SMUTE pin
Attenuation
ATT Level
-
∞
AOUT
GD
(2)
GD
(1)
(3)
(1)
Notes:
(1) ATT_DATA
×
ATT transition time (Table 8). For example, in Normal Speed Mode, this time is 1020LRCK cycles
(1020/fs) at ATT_DATA=255.
(2) The analog output corresponding to the digital input has a group delay, GD.
(3) If the soft mute is cancelled before attenuating to -
∞
after starting the operation, the attenuation is discontinued and
returned to ATT level by the same cycle.
Figure 11. Soft Mute function
System Reset
The AK4340 should be reset once by bringing PDN pin = “L” upon power-up. The AK4340 is powered up and the
internal timing starts clocking by LRCK “
↑
” after exiting reset and power down state by MCLK. The AK4340 is in the
power-down mode until MCLK and LRCK are input.
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