參數(shù)資料
型號: AK4115VQ
廠商: ASAHI KASEI POWER DEVICES CORP
元件分類: 消費家電
英文描述: High Feature 192kHz 24bit Digital Audio Interface Transceiver
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-64
文件頁數(shù): 43/64頁
文件大?。?/td> 606K
代理商: AK4115VQ
ASAHI KASEI
[AK4115]
MS0573-E-00
2006/12
- 43 -
LRCK(o)
BICK(o)
(64fs)
SDTO(0)
DAUX(I)
0
1
2
31
0
1
23:MSB, 0:LSB
V: Validity, C: C-bit, U:U-bit, B:B sync
Lch Data
Rch Data
24
26
25
24
31
0
1
2
26
25
27
27
0
1
28
23
U
V
2
1
0
C
B
23
U
V
2
1
0
C
B
28
Figure 39. AES3 Mode
Serial
Control
Interface
1. 4-wire serial control mode (IIC pin = “L”)
The internal registers may be either written or read by the 4-wire
μ
P interface pins: CSN, CCLK, CDTI & CDTO. The
data on this interface consists of Chip address (2-bits, C1-0 are fixed to “00”), Read/Write (1bit), Register address (MSB
first, 8-bits) and Control data (MSB first, 8-bits). Address and data is clocked in on the rising edge of CCLK and data is
clocked out on the falling edge. For write operations, data is latched after the 24th rising edge of CCLK, after a
high-to-low transition of CSN. For read operations, the CDTO output goes high impedance after a low-to-high transition
of CSN. The maximum speed of CCLK is 5MHz. PDN pin = “L” resets the registers to their default values. When the
state of P/SN pin is changed, the AK4115 should be reset by PDN pin = “L”. CSN should be brought “H” after each
word.
CSN
CDTI
CCLK
C1
0
1
2
3
4
5
6
7
16
17
18
19 20 21 22 23
D4
D5
D6
D7
0
0
0
0
0
C0
R/W
D0
D1
D2
D3
CDTO
Hi-Z
WRITE
CDTI
C1
D4
D5
D6
D7
0
0
0
0
0
C0
R/W
D0
D1
D2
D3
CDTO
Hi-Z
READ
D4
D5
D6
D7
D0
D1
D2
D3
Hi-Z
A7
8
9
10
11
12
13
14
15
A1
A2
A3
A4
A5
A6
A0
A7
A1
A2
A3
A4
A5
A6
A0
C1-C0: Chip Address (Fixed to “00”)
R/W: READ/WRITE (0:READ, 1:WRITE)
A7-A0: Register Address
D7-D0: Control Data
Figure 40. 4-wire Serial Control I/F Timing
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