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參數(shù)資料
| 型號： | AK4115VQ |
| 廠商： | ASAHI KASEI POWER DEVICES CORP |
| 元件分類： | 消費家電 |
| 英文描述： | High Feature 192kHz 24bit Digital Audio Interface Transceiver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 35/64頁 |
| 文件大小： | 606K |
| 代理商： | AK4115VQ |
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ASAHI KASEI
[AK4115]
MS0573-E-00
2006/12
- 35 -
1. Parallel Mode
In parallel mode, the INT0 pin outputs the ORed signal between UNLCK and PAR. The INT1 pin outputs the ORed
signal between AUTO and AUDION. Once INT0 goes ”H”, it maintains “H” for 1024/fs cycles after all error events are
removed. Table 25 shows the state of each output pins when the INT0/1 pin is “H”.
Event
UNLCK
PAR
AUTO
AUDION
1
x
x
x
0
1
x
x
0
0
x
x
x
x
1
x
x
x
x
1
x
x
0
0
Note 40. INT1 pin outputs “L” or “H” in accordance with the ORed signal between AUTO and
AUDION.
Note 41. INT0 pin outputs “L” or “H” in accordance with the ORed signal between UNLCK and
PAR.
Note
42.
SDTO pin outputs “L”, “Previous Data” or “Normal Data” in accordance with the ORed
signal between UNLCK and PAR.
Note 43. VOUT pin outputs “L” or “Normal operation” in accordance with the ORed signal
between PAR and UNCLK.
Table 25. Error Handling in parallel mode (x: Don’t care)
2. Serial Mode
In serial mode, the INT1 and INT0 pins output an ORed signal based on the above nine interrupt events. When masked,
the interrupt event does not affect the operation of the INT1-0 pins (the masks do not affect the registers in 07H and DAT
bit). Once INT0 pin goes to “H”, it remains “H” for 1024/fs (this value can be changed by the EFH1-0 bits) after all
events not masked by mask bits are cleared. INT1 pin immediately goes to “L” when those events are cleared.
UNLCK, PAR, AUTO, AUDION and VRX bits in Address=07H indicate the interrupt status events above in real time.
Once QINT, CINT and DAT bits go to “1”, it stays “1” until the register is read.
When the AK4115 loses lock, the channel status bit, user bit, Pc and Pd are initialized. In this initial state, INT0 pin
outputs the ORed signal between UNLCK and PAR bits. INT1 pin outputs the ORed signal between AUTO and
AUDION bits.
Event
UNLCK
PAR
Others
1
x
x
0
1
x
Previous Data
x
x
x
Table 26. Error Handling in serial mode (x: Don’t care)
Pin
INT0
INT1
SDTO
“L”
VOUT
“L”
Output
Output
“H”
Previous Data
Output
“L”
Note 40
“H”
Note 41
“L”
Note
42
Note 43
Pin
VOUT
“L”
Output
Output
SDTO
“L”
TX
Output
Output
Output
Output
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|---|---|
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AK4115VQP | 功能描述:IC AUDIO DECODER 24BIT 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| AK4116 | 制造商:AKM 制造商全稱:AKM 功能描述:192kHz digital audio receiver |
| AK4116_05 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 48kHz Digital Audio Receiver |
| AK4116384D | 制造商:ACCUTEK 制造商全稱:ACCUTEK MICROCIRCUIT CORPORATION 功能描述:65,536 x 32 Bit CMOS/BiCMOS Static Random Access Memory |
| AK4116384G | 制造商:ACCUTEK 制造商全稱:ACCUTEK MICROCIRCUIT CORPORATION 功能描述:65,536 x 32 Bit CMOS/BiCMOS Static Random Access Memory |
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