參數(shù)資料
型號(hào): AHA4011C-040PJC
廠商: Electronic Theatre Controls, Inc.
英文描述: 10 MBytes/sec Reed-Solomon Error Correction Device
中文描述: 10兆字節(jié)/秒的Reed - Solomon糾錯(cuò)裝置
文件頁數(shù): 19/28頁
文件大?。?/td> 466K
代理商: AHA4011C-040PJC
PS4011C-0200
Page 15 of 24
Advanced Hardware Architectures, Inc.
3.4
DATA OUTPUT
The DO pins are driven from a register clocked on the rising edge of CLK.
Valid data on the DO pins is indicated by RDYON being active. When RDYON is inactive, data on the
DO pins is undefined, and DSON is ignored. The DSON signal acknowledges receiving the data and is used
by the device to internally increment the address counter and output the next location in the buffer. This data
output timing is shown in Figure 10.
Figure 10: Data Output
CRTN is valid for an RS block when the first message byte, X
K
1
, is strobed out of the chip. Figure 11
shows Reverse Order output. In this operation, CRTN is valid on the last byte of the block from the Output
Buffer. In this example only message bytes are output, no check bytes.
Figure 11: CRTN Timing - Reverse Order Output
Note:
CRTN is active (low) if RS block m is correctable. If the number of errors detected in block m exceeds the
error threshold, P, CRTN is inactive (high).
NUMBER
1
2
3
DESCRIPTION
MINIMUM
10
2
MAXIMUM
UNITS
nsec
nsec
nsec
DSON setup time
DSON hold time
DO and RDYON output delay
15
NUMBER
1
2
3
DESCRIPTION
MINIMUM
10
2
MAXIMUM
UNITS
nsec
nsec
nsec
DSON setup time
DSON hold time
DO and RDYON output delay
15
valid
CLK
DO, ERR
DSON
RDYON
3
valid
valid
valid
valid
3
3
3
1 2
1
1
1
1
1
1
1
2
2
2
2
2
2
2
3
3
3
CLK
DO
DSON
RDYON
3
3
3
1 2
1
1
1
1
1
1
2
2
2
2
2
2
3
3
3
VALID
CRTN
3
Block m
Byte X
K-3
Block m
Byte X
K-2
Block m
Byte X
K-1
error
correctable
3
Block m+1
Byte X
0
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