- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10973 > ADV7393BCPZ (Analog Devices Inc)IC DAC VIDEO HDTV 10BIT 40LFCSP PDF資料下載
參數(shù)資料
| 型號： | ADV7393BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 66/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO HDTV 10BIT 40LFCSP |
| 產(chǎn)品變化通告： | ADV734x, ADV739x Feature Improvement |
| 設計資源： | Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101) |
| 標準包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應用： | 機頂盒，視頻播放器，顯示器 |
| 電壓 - 電源，模擬： | 2.6 V ~ 3.46 V |
| 電壓 - 電源，數(shù)字： | 1.71 V ~ 1.89 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 786 (CN2011-ZH PDF) |
| 配用： | ADV7393-DBRDZ-ND - BOARD EVAL FOR ADV7393 EVAL-ADV7393EBZ-ND - BOARD EVAL FOR ADV7393 ENCODER |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁當前第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 60 of 108
The gamma curves in Figure 71 and Figure 72 are examples only;
any user-defined curve in the range from 16 to 240 is acceptable.
Figure 71. Signal Input (Ramp) and Signal Output for Gamma 0.5
Figure 72. Signal Input (Ramp) and Selectable Output Curves
ED/HD SHARPNESS FILTER AND ADAPTIVE FILTER
CONTROLS
Subaddress 0x40; Subaddress 0x58 to Subaddress 0x5D
There are three filter modes available on the ADV739x:
sharpness filter mode and two adaptive filter modes.
ED/HD Sharpness Filter Mode
To enhance or attenuate the Y signal in the frequency ranges
shown in Figure 73, the ED/HD sharpness filter must be
enabled (Subaddress 0x31, Bit 7 = 1) and the ED/HD adaptive
filter must be disabled (Subaddress 0x35, Bit 7 = 0).
To select one of the 256 individual responses, the corresponding
gain values, ranging from 8 to +7 for each filter, must be
programmed into the ED/HD sharpness filter gain register at
Subaddress 0x40.
ED/HD Adaptive Filter Mode
In ED/HD adaptive filter mode, the following registers are used:
ED/HD Adaptive Filter Threshold A
ED/HD Adaptive Filter Threshold B
ED/HD Adaptive Filter Threshold C
ED/HD Adaptive Filter Gain 1
ED/HD Adaptive Filter Gain 2
ED/HD Adaptive Filter Gain 3
ED/HD sharpness filter gain
To activate the adaptive filter control, the ED/HD sharpness
filter and the ED/HD adaptive filter must be enabled
(Subaddress 0x31, Bit 7 = 1, and Subaddress 0x35, Bit 7 = 1,
respectively).
The derivative of the incoming signal is compared to the three
programmable threshold values: ED/HD adaptive filter
(Threshold A, Threshold B, and Threshold C ) registers
(Subaddress 0x5B, Subaddress 0x5C, and Subaddress 0x5D).
The recommended threshold range is 16 to 235, although any
value in the range of 0 to 255 can be used.
The edges can then be attenuated with the settings in the
ED/HD adaptive filter (Gain 1, Gain 2, and Gain 3) registers
(Subaddress 0x58, Subaddress 0x59 and Subaddress 0x5A), and
the ED/HD sharpness filter gain register (Subaddress 0x40).
There are two adaptive filter modes available. The mode is
selected using the ED/HD adaptive filter mode control
(Subaddress 0x35, Bit 6) as follows:
Mode A is used when the ED/HD adaptive filter mode
control is set to 0. In this case, Filter B (LPF) is used in the
adaptive filter block. In addition, only the programmed
values for Gain B in the ED/HD sharpness filter gain
register and ED/HD adaptive filter (Gain 1, Gain 2, and
Gain 3) registers are applied when needed. The Gain A
values are fixed and cannot be changed.
Mode B is used when ED/HD adaptive filter mode control is
set to 1. In this mode, a cascade of Filter A and Filter B is used.
Both settings for Gain A and Gain B in the ED/HD sharpness
filter gain register and ED/HD adaptive filter (Gain 1, Gain 2,
and Gain 3) registers become active when needed.
LOCATION
0
50
100
150
200
250
300
50
100
150
200
250
0.5
SIGNAL INPUT
G
AM
M
A
CO
RRE
CT
E
D
AM
P
L
IT
UDE
SIGNAL OUTPUT
GAMMA CORRECTION BLOCK OUTPUT TO A RAMP INPUT
06234-
072
LOCATION
0
50
100
150
200
250
300
50
100
150
200
250
G
AM
M
A
CO
RRE
CT
E
D
AM
P
L
IT
UDE
GAMMA CORRECTION BLOCK TO A RAMP INPUT FOR
VARIOUS GAMMA VALUES
0.3
0.5
1.5
1.8
SIGN
AL
INP
UT
06234-
073
相關PDF資料 |
PDF描述 |
|---|---|
| VE-B7H-IW-B1 | CONVERTER MOD DC/DC 52V 100W |
| VE-B74-IX-B1 | CONVERTER MOD DC/DC 48V 75W |
| VE-B74-IW-B1 | CONVERTER MOD DC/DC 48V 100W |
| VE-B73-IX-B1 | CONVERTER MOD DC/DC 24V 75W |
| VE-B72-IX-B1 | CONVERTER MOD DC/DC 15V 75W |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7393BCPZ-REEL | 功能描述:IC DAC ENCODER VID HDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應商設備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7393-DBRDZ | 功能描述:BOARD EVAL FOR ADV7393 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| ADV7393EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder |
| ADV7393WBCPZ | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays |
| ADV7393WBCPZ-REEL | 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。