參數(shù)資料
型號： ADV7393BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/108頁
文件大?。?/td> 0K
描述： IC DAC VIDEO HDTV 10BIT 40LFCSP
產(chǎn)品變化通告： ADV734x, ADV739x Feature Improvement
設(shè)計資源： Reconstruction Video Filter Using ADA4430-1 Amplifier After ADV7393 Video Encoder (CN0101)
標準包裝： 1
類型： 視頻編碼器
應(yīng)用： 機頂盒，視頻播放器，顯示器
電壓 - 電源，模擬： 2.6 V ~ 3.46 V
電壓 - 電源，數(shù)字： 1.71 V ~ 1.89 V
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 托盤
產(chǎn)品目錄頁面： 786 (CN2011-ZH PDF)
配用： ADV7393-DBRDZ-ND - BOARD EVAL FOR ADV7393
EVAL-ADV7393EBZ-ND - BOARD EVAL FOR ADV7393 ENCODER
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 4 of 108
Added Digital Input/Output Specifications—1.8 V Section and
Table 6 ................................................................................................ 7
Changes to MPU Port Timing Specifications Section,
Default Conditions ........................................................................... 7
Changes to Digital Timing Specifications—3.3 V Section and
Table 8 ................................................................................................ 8
Added Digital Timing Specifications—1.8 V Section and
Table 9 ................................................................................................ 9
Added Video Performance Specifications Section, Default
Conditions ....................................................................................... 10
Added Power Specifications Section, Default Conditions........ 10
Changes to Table 11........................................................................ 10
Changes to Figure 16...................................................................... 16
Changes to Table 12........................................................................ 17
Changes to Table 14, Pin 19 and Pin 1 Descriptions ................. 18
Changes to MPU Port Description Section ................................ 25
Changes to I2C Operation Section ............................................... 25
Added Table 15 ............................................................................... 25
Changes to Table 17........................................................................ 28
Changes to Table 19, 0x30 Bit Description ................................. 30
Changes to Table 27........................................................................ 37
Changes to Table 29, 0x8B Bit Description................................. 39
Changes to Table 30........................................................................ 40
Changes to Table 31........................................................................ 41
Added Table 32 ............................................................................... 42
Renamed Features Section to Design Features Section............. 48
Changes to ED/HD Nonstandard Timing Mode Section......... 48
Added the HD Interlace External HSYNC and VSYNC
Considerations Section.................................................................. 49
Changes to SD Subcarrier Frequency Lock, Subcarrier Reset,
and Timing Reset Section.............................................................. 49
Changes to Subaddress 0x8C to Subaddress 0x8F Section....... 51
Changes to Programming the FSC Section................................... 51
Changes to Subaddress 0x82, Bit 4 Section................................. 51
Added SD Manual CSC Matrix Adjust Feature Section............ 54
Added Table 47 ............................................................................... 55
Changes to Subaddress 0x9C to Subaddress 0x9F Section....... 56
Changes to Subaddress 0xBA Section.......................................... 56
Added Sleep Mode Section ........................................................... 65
Changes to Pixel and Control Port Readback Section .............. 66
Changes to Reset Mechanisms Section ....................................... 66
Added SD Teletext Insertion Section........................................... 66
Added Figure 87 ............................................................................. 67
Added Figure 88 ............................................................................. 68
Changes to DAC Configuration Section..................................... 68
Added Unused Pins Section.......................................................... 68
Changes to Power Supply Sequencing Section........................... 70
Changes to Internal Test Pattern Generation Section ............... 77
Changes to SD Timing, Mode 0 (CCIR-656)—Slave Option
(Subaddress 0x8A = XXXXX000) Section.................................. 78
10/06—Revision 0: Initial Version
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7393BCPZ-REEL 功能描述:IC DAC ENCODER VID HDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標準包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799
ADV7393-DBRDZ 功能描述:BOARD EVAL FOR ADV7393 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:Advantiv® 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081
ADV7393EBZ 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7393WBCPZ 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Trays
ADV7393WBCPZ-REEL 制造商:Analog Devices 功能描述:LOW POWER, CHIP SCALE 10-BIT SD/HD VIDEO ENCODER - Tape and Reel
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