參數(shù)資料
型號(hào): ADV7324KSTZ
廠商: ANALOG DEVICES INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs
中文描述: COLOR SIGNAL ENCODER, PQFP64
封裝: LEAD FREE, MS-026BCD, LQFP-64
文件頁(yè)數(shù): 81/92頁(yè)
文件大?。?/td> 992K
代理商: ADV7324KSTZ
ADV7324
MODE 3—MASTER/SLAVE OPTION
(TIMING REGISTER 0 TR0 = X X X X X 1 1 0 OR X X X X X 1 1 1)
In this mode, the ADV7324 accepts or generates horizontal
sync and odd/even field signals. When HSYNC is high, a
transition of the field input indicates a new frame, i.e., vertical
retrace. The BLANK signal is optional. When the BLANK input
is disabled, ADV7324 automatically blanks all normally blank
lines as per CCIR-624. HSYNC, BLANK, and VSYNC are
output in master mode and input in slave mode on S_VSYNC,
S_BLANK, and S_VSYNC, respectively.
Rev. 0 | Page 81 of 92
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283
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ODD FIELD
EVEN FIELD
DISPLAY
DISPLAY
VERTICAL BLANK
522
523
524
525
9
10
11
20
21
22
DISPLAY
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
HSYNC
BLANK
FIELD
0
HSYNC
BLANK
FIELD
8
7
6
5
4
3
2
1
Figure 119. SD Timing Mode 3 (NTSC)
622
623
624
625
5
6
21
22
23
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
334
335
336
DISPLAY
VERTICAL BLANK
ODD FIELD
EVEN FIELD
FIELD
DISPLAY
320
4
3
2
1
7
HSYNC
BLANK
HSYNC
BLANK
0
Figure 120. SD Timing Mode 3 (PAL)
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