參數(shù)資料
型號(hào)： ADV7314KST
廠商： ANALOG DEVICES INC
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs
中文描述： COLOR SIGNAL ENCODER, PQFP64
封裝： LEAD FREE, MS-026BCD, LQFP-64
文件頁(yè)數(shù)： 18/84頁(yè)
文件大?。?/td> 1069K
代理商： ADV7314KST
REV. 0
–18–
ADV7314
Before writing to the subcarrier frequency registers, the ADV7314
must have been reset at least once since power-up.
The four subcarrier frequency registers must be updated start-
ing with subcarrier frequency register 0 through subcarrier
frequency register 3. The subcarrier frequency will not update
until the last subcarrier frequency register byte has been received
by the ADV7314.
Figure 18 illustrates an example of the data transfer for a write
sequence and the start and stop conditions.
Figure 19 shows bus write and read sequences.
REGISTER ACCESS
The MPU can write to or read from all of the registers of the
ADV7314 except the subaddress registers, which are write-only
registers. The subaddress register determines which register the
SDATA
SCLOCK
START ADRR R/
W
ACK
SUBADDRESS ACK
DATA
ACK
STOP
1–7
8
9
S
1–7
8
9
1–7
8
9
P
Figure 18. Bus Data Transfer
WRITE
SEQUENCE
READ
SEQUENCE
S
SLAVE ADDR
A(S)
SUB ADDR
A(S)
DATA
A(S)
DATA
A(S)
P
S
SLAVE ADDR
A(S)
SUB ADDR
A(S) S
SLAVE ADDR
A(S)
DATA
DATA
A(M)
A
(M)
P
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A
(S) = NO-ACKNOWLEDGE BY SLAVE
A
(M) = NO-ACKNOWLEDGE BY MASTER
LSB = 0
LSB = 1
Figure 19. Write and Read Sequence
next read or write operation accesses. All communications with
the part through the bus start with an access to the subaddress
register. A read/write operation is then performed from/to the
target address, which increments to the next address until a stop
command on the bus is performed.
Register Programming
The following section describes the functionality of each register.
All registers can be read from as well as written to unless other-
wise stated.
Subaddress Register (SR7–SR0)
The communications register is an 8-bit write-only register. After
the part has been accessed over the bus and a read/write opera-
tion is selected, the subaddress is set up. The subaddress register
determines to/from which register the operation takes place.
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