參數(shù)資料
型號(hào): ADV7302A
廠商: Analog Devices, Inc.
英文描述: 32X2 SHROUDED VERT. HDR
中文描述: 多格式統(tǒng)計(jì),逐行掃描/ HDTV視頻編碼器與六11位DAC
文件頁(yè)數(shù): 43/68頁(yè)
文件大小: 1177K
代理商: ADV7302A
REV. A
ADV7302A/ADV7303A
–43–
Example:
Scale Factor = 1.18
Y, U, or V Scale Value
= 1.18 512 = 665.6
Y, U, or V Scale Value
= 665
(rounded to nearest integer)
Y, U, or V Scale Value
= 1010011001
b
Address 5Ch, SD LSB Register = 15h
Address 5Dh, SD Y Scale Register = A6h
Address 5Eh, SD V Scale Register = A6h
Address 5Fh, SD U Scale Register = A6h
SD Hue Adjust Value
[Subaddress 60h]
The Hue Adjust Value is used to adjust the hue on the compos-
ite and chroma outputs.
These eight bits represent the value required to vary the hue of
the video data, i.e., the variance in phase of the subcarrier during
active video with respect to the phase of the subcarrier during the
color burst. The ADV7302A/ADV7303A provides a range of
±
22.5
°
in increments of 0.17578125
°
. For normal operation (zero
adjustment), this register is set to 80h. FFh and 00h represent the
attainable upper and lower limit (respectively) of adjustment.
For a positive hue adjust value:
0.17578125
°
(
HCR
– 128)
Example:
To adjust the hue by +4
°
, write 97h to the Hue Adjust Value
Register:
+
+
0 17578125
.
where 151 is rounded to the nearest integer. To adjust the hue
by –4
°
,
write 69h to the Hue Adjust Value Register:
=
=
4
128
151
97
h
0 17578125
.
4
128
105
69
+
=
=
h
where 105 is rounded to the nearest integer.
SD Brightness Control
[Subaddress 61h]
The brightness is controlled by adding a programmable setup
level onto the scaled Y data. This brightness level may be added
onto the scaled Y data. For NTSC with pedestal, the setup can
vary from 0 IRE to 22.5 IRE. For NTSC without pedestal and
for PAL, the setup can vary from –7.5 IRE to +15 IRE.
The Brightness Control Register is an 8-bit wide register. Seven
bits are used to control the brightness level. This brightness
level can be a positive or negative value.
Example:
Standard: NTSC with pedestal. To add +20 IRE brightness
level, write 28h to Address 61h, SD Brightness:
SD Brightness Value
(hex) = (
IRE Value
2.015631)
28h = (20 2.015631) = 40.31262
Standard: PAL.
To add –7 IRE brightness level, write 72h to
Address 61h, SD Brightness:
SD Brightness Value
(hex) = (
IRE Value
2.015631)
0001110
b
= (7 2.015631) = 14.109417
0001110 in twos complement equals 1110010, or 72h.
SD Brightness Detect
[Subaddress 7Ah]
The ADV7302A/ADV7303A allows monitoring of the bright-
ness level of the incoming video data. The Brightness Detect
Register is a read-only register.
Double Buffering
[Subaddress 13h, Bit 7; Subaddress 48h, Bit 2]
Double buffered registers are updated once per field on the
falling edge of the VSYNC signal. Double buffering improves
the overall performance since modifications to register settings
will not be made during active video but take effect on the start
of the active video.
Double buffering can be activated on the following HD regis-
ters: HD Gamma A and Gamma B curves and HD CGMS
Registers. Double buffering can be activated on the following
SD Registers: SD Gamma A and Gamma B Curves, SD Y
Scale, SD U Scale, SD V Scale, SD Brightness, SD Closed
Captioning, and SD Macrovision Bits 5–0.
Table XVIII. Brightness Control Values
Setup Level—
NTSC w/Pedestal (IRE)
Setup Level—
NTSC w/o Pedestal (IRE)
Setup Level—
PAL (IRE)
SD Brightness
Value
22.5
15
7.5
0
+15
+7.5
0
–7.5
+15
+7.5
0
–7.5
1Eh
0Fh
00h
71h
Values in the range from 3Fh to 44h might result in an invalid output signal.
NTSC WITHOUT PEDESTAL
NO SETUP
VALUE ADDED
POSITIVE SETUP
VALUE ADDED
100 IRE
0 IRE
NEGATIVE SETUP
VALUE ADDED
–7.5 IRE
+7.5 IRE
Figure 60. Examples for Brightness Control Values
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