- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374047 > ADV7302A (Analog Devices, Inc.) 32X2 SHROUDED VERT. HDR PDF資料下載
參數(shù)資料
| 型號(hào)： | ADV7302A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 32X2 SHROUDED VERT. HDR |
| 中文描述： | 多格式統(tǒng)計(jì)，逐行掃描/ HDTV視頻編碼器與六11位DAC |
| 文件頁(yè)數(shù)： | 15/68頁(yè) |
| 文件大?。?/td> | 1177K |
| 代理商： | ADV7302A |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)
REV. A
ADV7302A/ADV7303A
–15–
REGISTER ACCESSES
The MPU can write to or read from all of the registers of the
ADV7302A/ADV7303A except the subaddress registers that are
write-only registers. The subaddress register determines which
register the next read or write operation accesses. All communica-
tions with the part through the bus start with an access to the
subaddress register. Then a read/write operation is performed
from/to the target address which then increments to the next
address until a stop command on the bus is performed.
REGISTER PROGRAMMING
The following section describes the functionality of each regis-
ter. All registers can be read from as well as written to, unless
otherwise stated.
Subaddress Register (SR7–SR0)
The Communications Register is an 8-bit write-only register.
After the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The Subaddress
Register determines to/from which register the operation
takes place.
Register Select (SR7–SR0)
These bits are set up to point to the required starting address.
WRITE
SEQUENCE
READ
SEQUENCE
S
SLAVE ADDR
A(S)
SUB ADDR
A(S)
DATA
A(S)
DATA
A(S)
P
S
SLAVE ADDR
A(S)
SUB ADDR
A(S) S
SLAVE ADDR
A(S)
DATA
DATA
A(M)
A(M)
P
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A
(S) = NO-ACKNOWLEDGE BY SLAVE
A
(M) = NO-ACKNOWLEDGE BY MASTER
LSB = 0
LSB = 1
Figure 18. Read and Write Sequence
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7302AKST | Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:6; Roll Length:30ft; Width:2" |
| ADV7303A | Sand Paper; Abrasive Grade:A VFN; Color:Maroon; Pack Quantity:4; Roll Length:30ft; Width:3" |
| ADV7303AKST | Sand Paper; Abrasive Grade:T; Color:White; Pack Quantity:3; Roll Length:30ft; Width:4" |
| ADV7310 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7310KST | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7302AKST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SD, Progressive Scan/HDTV Video Encoder with Six 11-Bit DACs |
| ADV7303A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SD, Progressive Scan/HDTV Video Encoder with Six 11-Bit DACs |
| ADV7303AKST | 制造商:Rochester Electronics LLC 功能描述:150MHZ HD 108MHZ PROG SCAN 11BIT ENC I.C - Bulk 制造商:Analog Devices 功能描述: |
| ADV73045701 | 制造商:LG Corporation 功能描述:Frame Assembly |
| ADV73045702 | 制造商:LG Corporation 功能描述:Frame Assembly |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。