![](http://datasheet.mmic.net.cn/310000/ADV7192KST_datasheet_16243955/ADV7192KST_11.png)
ADV7192
–
11
–
REV. 0
DETAILED DESCRIPTION OF FEATURES
Clocking:
Single 27 MHz Clock Required to Run the Device
4 Oversampling with Internal 54 MHz PLL
Square Pixel Operation
Advanced Power Management
Programmable Video Control Features:
Digital Noise Reduction
Black Burst Signal Generation
Pedestal Level
Hue, Brightness, Contrast, and Saturation
Clamping Output Signal
VBI (Vertical Blanking Interval)
Subcarrier Frequency and Phase
LUMA Delay
CHROMA Delay
Gamma Correction
Luma And Chroma Filters
Luma SSAF (Super Subalias Filter)
Average Brightness Detection
Field Counter
Interlaced/Noninterlaced Operation
Complete On-Chip Video Timing Generator
Programmable Multimode Master/Slave Operation
Macrovision Rev 7.1
CGMS (Copy Generation Management System)
WSS (Wide Screen Signaling)
Closed Captioning Support
Teletext Insertion Port (PAL-WST)
2-Wire Serial MPU Interface
(I
2
C-Compatible And Fast I
2
C)
I
2
C Registers Synchronized to VSYNC
GENERAL DESCRIPTION
The ADV7192 is an integrated Digital Video Encoder that
converts digital CCIR-601/656 4:2:2 8-bit or 16-bit component
video data into a standard analog baseband television signal
compatible with worldwide standards. Additionally, it is possible
I
N
T
E
R
P
O
L
A
T
O
R
MODULATOR
AND
HUE CONTROL
BRIGHTNESS
CONTROL
AND
ADD SYNC
AND
INTERPOLATOR
SATURATION
CONTROL
AND
ADD BURST
AND
INTERPOLATOR
PROGRAMMABLE
LUMA FILTER
AND
SHARPNESS
FILTER
PROGRAMMABLE
CHROMA
FILTER
SIN/COS
DDS
BLOCK
REAL-TIME
CONTROL
CIRCUIT
SCRESET/RTC/TR
I
N
T
E
R
P
O
L
A
T
O
R
M
U
L
T
I
P
L
E
X
E
R
YUV-TO-RGB
MATRIX
AND
YUV LEVEL
CONTROL
BLOCK
Y0
–
Y9
Cb0
–
Cb9
Cr0
–
Cr9
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC
CONTROL
BLOCK
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC
CONTROL
BLOCK
DAC A
DAC B
DAC C
V
REF
R
SET2
COMP2
DAC D
DAC F
DAC E
R
SET1
COMP1
DNR
AND
GAMMA
CORRECTION
10
10
10
V
U
Y
YCrCb-
TO-
YUV
MATRIX
10
10
10
V
U
Y
PLL
DEMUX
10 10
10
TELETEXT
INSERTION
BLOCK
VIDEO TIMING
GENERATOR
CGMS/WSS
AND
CLOSED CAPTIONING
CONTROL
I
2
C MPU PORT
ALSB
SDA
SCL
PAL_NTSC
VSO
/CLAMP
CSO_HSO
HSYNC
VSYNC
BLANK
RESET
TTX
TTXRQ
P0
P15
CLKIN
CLKOUT
ADV7192
Figure 5. Detailed Functional Block Diagram
to input video data in 3 10-bit YCrCb progressive scan format
to facilitate interfacing devices such as progressive scan systems.
Six DACs are available on the ADV7192, each of which is capable
of providing 4.33 mA of current. In addition to the composite
output signal there is the facility to output S-Video (Y/C Video),
RGB Video and YUV Video. All YUV formats (SMPTRE/EBU
N10, MII or Betacam) are supported.
The on-board SSAF (Super Subalias Filter) with extended lumi-
nance frequency response and sharp stopband attenuation
enables studio quality video playback on modern TVs, giving
optimal horizontal line resolution. An additional sharpness
control feature allows high-frequency enhancement on the
luminance signal.
SUBTRACT SIGNAL IN THRESHOLD
RANGE FROM ORIGINAL SIGNAL
FILTER OUTPUT
>THRESHOLD
FILTER OUTPUT<
THRESHOLD
INPUT FILTER
BLOCK
MAIN SIGNAL PATH
NOISE SIGNAL PATH
Y DATA
INPUT
DNR OUT
ADD SIGNAL ABOVE THRESHOLD
RANGE TO ORIGINAL SIGNAL
DNR CONTROL
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
GAIN
CORING GAIN DATA
CORING GAIN BORDER
DNR SHARPNESS MODE
FILTER OUTPUT
<THRESHOLD
FILTER OUTPUT>
THRESHOLD
INPUT FILTER
BLOCK
MAIN SIGNAL PATH
NOISE SIGNAL PATH
Y DATA
INPUT
DNR OUT
DNR CONTROL
BLOCK SIZE CONTROL
BORDER AREA
BLOCK OFFSET
GAIN
CORING GAIN DATA
CORING GAIN BORDER
DNR MODE
Figure 6. Block Diagram for DNR Mode and DNR Sharpness
Mode