參數(shù)資料
型號(hào)： ADV7180WBCPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 116/116頁
文件大?。?/td> 0K
描述： IC VIDEO DECODER SDTV 40LFCSP
標(biāo)準(zhǔn)包裝： 2,500
類型： 視頻解碼器
應(yīng)用： 數(shù)碼相機(jī)，手機(jī)，便攜式視頻
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 帶卷 (TR)
Data Sheet
ADV7180
Rev. I | Page 99 of 116
Main Map
Bit Description
Bits
(Shading Indicates Default State)
Comments
Notes
Subaddress
Register
7
6
5
4
3
2
1
0
0xF3
AFE_CONTROL 1
AA_FILT_EN[2:0];
antialiasing filter enable
0
Antialiasing Filter 1 disabled
AA_FILT_MAN_OVR
must be enabled
to change settings
defined by
INSEL[3:0]
1
Antialiasing Filter 1 enabled
0
Antialiasing Filter 2 disabled
1
Antialiasing Filter 2 enabled
0
Antialiasing Filter 3 disabled
1
Antialiasing Filter 3 enabled
AA_FILT_MAN_OVR;
antialiasing filter override
0
Override disabled
1
Override enabled
Reserved
0
0xF4
Drive strength
DR_STR_S[1:0]; selects
the drive strength for
the sync output signals
0
Low drive strength (1×)
0
1
Medium low drive strength (2×)
1
0
Medium high drive strength (3×)
1
High drive strength (4×)
DR_STR_C[1:0]; selects
the drive strength for
the clock output signal
0
Low drive strength (1×)
0
1
Medium low drive strength (2×)
1
0
Medium high drive strength (3×)
1
High drive strength (4×)
DR_STR[1:0]; selects the
drive strength for the data
output signals; can be
increased or decreased for
EMC or crosstalk reasons
0
Low drive strength (1×)
0
1
Medium low drive strength (2×)
1
0
Medium high drive strength (3×)
1
High drive strength (4×)
Reserved
x
0xF8
IF comp
control
IFFILTSEL[2:0]; IF filter
selection for PAL and
NTSC
0
Bypass mode
0 dB
2 MHz
5 MHz
NTSC filters
0
1
3 dB
2 dB
0
1
0
6 dB
+3.5 dB
0
1
10 dB
+5 dB
1
0
Reserved
3 MHz
6 MHz
PAL filters
1
0
1
2 dB
+2 dB
1
0
5 dB
+3 dB
1
7 dB
+5 dB
Reserved
0
0xF9
VS mode
control
EXTEND_VS_MAX_FREQ
0
Limits maximum VSYNC frequency to
66.25 Hz (475 lines/frame)
1
Limits maximum VSYNC frequency to
70.09 Hz (449 lines/frame)
EXTEND_VS_MIN_FREQ
0
Limits minimum VSYNC frequency to
42.75 Hz (731 lines/frame)
1
Limits minimum VSYNC frequency to
39.51 Hz (791 lines/frame)
VS_COAST_MODE[1:0]
0
Autocoast mode
This value sets up
the output coast
frequency
0
1
50 Hz coast mode
1
0
60 Hz coast mode
1
Reserved
0
0xFB
Peaking control
PEAKING_GAIN[7:0]
0
1
0
Increases/decreases the gain for high
frequency portions of the video signal
0xFC
Coring
threshold
DNR_TH2[7:0]
0
1
0
Specifies the maximum edge that is
interpreted as noise and therefore
blanked
1
Shading indicates default values.
2
x indicates a bit that keeps the last written value.
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參數(shù)描述
ADV7180WBST48Z 制造商:Analog Devices 功能描述:
ADV7180WBST48Z-RL 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
ADV7180WBSTZ 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
ADV7180WBSTZ-REEL 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
ADV7181 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
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