參數(shù)資料
型號： ADV7180WBCPZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 111/116頁
文件大小： 0K
描述： IC VIDEO DECODER SDTV 40LFCSP
標準包裝： 2,500
類型： 視頻解碼器
應(yīng)用： 數(shù)碼相機，手機，便攜式視頻
安裝類型： 表面貼裝
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 40-LFCSP-VQ（6x6）
包裝： 帶卷 (TR)
ADV7180
Data Sheet
Rev. I | Page 94 of 116
Main Map
Bit Description
Bits
(Shading Indicates Default State)
Comments
Notes
Subaddress
Register
7
6
5
4
3
2
1
0
0x4A
Gemstar
Control 3
GDECOL[15:8]; see the
Comments column
0
GDECOL[15:0]: 16 individual enable bits
that select the lines of video (odd field
Line 10 to Line 25) that the decoder
checks for Gemstar-compatible data
LSB = Line 10,
MSB = Line 25,
Default = do not
check for Gemstar-
compatible data on
any lines [10 to 25]
in odd fields
0x4B
Gemstar
Control 4
GDECOL[7:0]
0
0x4C
Gemstar
Control 5
GDECAD; controls the
manner decoded Gemstar
data is inserted into the
horizontal blanking period
0
Split data into half-byte
To avoid 00/FF code
1
Output in straight 8-bit format
GDE_SEL_OLD_ADF
0
Enables a new ancillary data system
Reserved
x
Undefined
0x4D
CTI DNR
Control 1
CTI_EN; CTI enable
0
Disable CTI
1
Enable CTI
CTI_AB_EN; enables the
mixing of the transient
improved chroma with
the original signal
0
Disable CTI alpha blender
1
Enable CTI alpha blender
CTI_AB[1:0]; controls the
behavior of the alpha-
blend circuitry
0
Sharpest mixing
0
1
Sharp mixing
1
0
Smooth mixing
1
Smoothest mixing
Reserved
0
Set to default
DNR_EN; enable or bypass
the DNR block
0
Bypass the DNR block
1
Enable the DNR block
Reserved
1
Set to default
0x4E
CTI DNR
Control 2
CTI_C_TH[7:0]; specifies
how big the amplitude
step must be to be steep-
ened by the CTI block
0
1
0
Set to 0x04 for AV input;
set to 0x0A for tuner input
0x50
CTI DNR
Control 4
DNR_TH[7:0]; specifies
the maximum edge that is
interpreted as noise and is
therefore blanked
0
1
0
0x51
Lock count
CIL[2:0]; count into lock
determines the number of
lines the system must
remain in lock before
showing a locked status
0
One line of video
0
1
Two lines of video
0
1
0
Five lines of video
0
1
10 lines of video
1
0
100 lines of video
1
0
1
500 lines of video
1
0
1000 lines of video
1
100,000 lines of video
COL[2:0]; count out of
lock determines the
number of lines the
system must remain out-
of-lock before showing a
lost-locked status
0
1 line of video
0
1
2 lines of video
0
1
0
5 lines of video
0
1
10 lines of video
1
0
100 lines of video
1
0
1
500 lines of video
1
0
1000 lines of video
1
100,000 lines of video
SRLS; select raw lock signal;
selects the determination
of the lock status
0
Over field with vertical info
1
Line-to-line evaluation
FSCLE; fSC lock enable
0
Lock status set only by horizontal lock
1
Lock status set by horizontal lock and
subcarrier lock
0x52
CVBS_TRIM
CVBS_IBIAS[3:0], sets the
bias current for the analog
front end for CVBS inputs.
1
0
1
Default AFE bias current setting
1
0
1
Recommended AFE bias current for
CVBS inputs
Reserved
0
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參數(shù)描述
ADV7180WBST48Z 制造商:Analog Devices 功能描述:
ADV7180WBST48Z-RL 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
ADV7180WBSTZ 功能描述:視頻 IC 10-bit 4x Oversampling SDTV Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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ADV7181 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat SDTV Video Decoder
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