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| 型號： | ADV7179KCPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ENCODER VID NTSC/PAL 40LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 數(shù)碼相機(jī)，手機(jī)，便攜式視頻 |
| 電壓 - 電源，模擬： | 2.8 V，3.3 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 40-LFCSP-VQ（6x6） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 786 (CN2011-ZH PDF) |
| 其它名稱： | ADV7179KCPZ-REELDKR |
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ADV7174/ADV7179
Rev. B | Page 27 of 52
REGISTER PROGRAMMING
This section describes the configuration of each register,
including the subaddress register, mode registers, subcarrier
frequency registers, the subcarrier phase register, timing
registers, closed captioning extended data registers, closed
captioning data registers, and NTSC pedestal control registers.
SUBADDRESS REGISTER (SR7–SR0)
The communications register is an 8-bit write-only register.
After the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
Figure 37 shows the various operations under the control of the
subaddress register. Zero should always be written to SR7–SR6.
REGISTER SELECT (SR5–SR0)
These bits are set up to point to the required starting address.
SR4
SR3
SR2
SR1
SR0
SR7
SR6
SR5
ZERO SHOULD BE WRITTEN
TO THESE BITS
SR7 – SR6(000)
POWER-UP
VALUES
SR5 SR4 SR3 SR2 SR1 SR0
0
MODE REGISTER 0
0
1
MODE REGISTER 1
00
1
MODE REGISTER 2
00
1
MODE REGISTER 3
00
0
MODE REGISTER 4
0
RESERVED
0
1
RESERVED
00
1
TIMING MODE REGISTER 0
01
0
TIMING MODE REGISTER 1
0
1
0
SUBCARRIER FREQUENCY REGISTER 0
0
1
SUBCARRIER FREQUENCY REGISTER 1
0
1
SUBCARRIER FREQUENCY REGISTER 2
0
1
0
SUBCARRIER FREQUENCY REGISTER 3
0
1
0
SUBCARRIER PHASE REGISTER
0
1
CLOSED CAPTIONING EXTENDED DATA BYTE 0
0
1
CLOSED CAPTIONING EXTENDED DATA BYTE 1
0
CLOSED CAPTIONING DATA BYTE 0
0
CLOSED CAPTIONING DATA BYTE 1
0
1
NTSC PEDESTAL CONTROL REGISTER 0/
PAL TTX CONTROL REGISTER 0
0
1
NTSC PEDESTAL CONTROL REGISTER 1/
PAL TTX CONTROL REGISTER 1
0
NTSC PEDESTAL CONTROL REGISTER 2/
PAL TTX CONTROL REGISTER 2
0
NTSC PEDESTAL CONTROL REGISTER 3/
PAL TTX CONTROL REGISTER 3
0
1
CGMS_WSS_0
0
1
CGMS_WSS_1
0
1
0
CGMS_WSS_2
0
1
11
0
1
0
1
0
1
0
00
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TELETEXT REQUEST CONTROL REGISTER
ADV7179 SUBADDRESS REGISTER
SR5 SR4 SR3 SR2 SR1 SR0
ADV7174 SUBADDRESS REGISTER
0
MODE REGISTER 0
0
MODE REGISTER 1
0
1
MODE REGISTER 2
0
1
MODE REGISTER 3
0
MODE REGISTER 4
0
RESERVED
0
1
RESERVED
0
1
TIMING MODE REGISTER 0
0
1
0
TIMING MODE REGISTER 1
0
1
0
SUBCARRIER FREQUENCY REGISTER 0
0
1
SUBCARRIER FREQUENCY REGISTER 1
0
1
SUBCARRIER FREQUENCY REGISTER 2
0
1
0
SUBCARRIER FREQUENCY REGISTER 3
0
1
0
SUBCARRIER PHASE REGISTER
0
1
CLOSED CAPTIONING EXTENDED DATA BYTE 0
0
1
CLOSED CAPTIONING EXTENDED DATA BYTE 1
0
CLOSED CAPTIONING DATA BYTE 0
0
CLOSED CAPTIONING DATA BYTE 1
0
1
NTSC PEDESTAL CONTROL REGISTER 0/
PAL TTX CONTROL REGISTER 0
0
1
NTSC PEDESTAL CONTROL REGISTER 1/
PAL TTX CONTROL REGISTER 1
0
NTSC PEDESTAL CONTROL REGISTER 2/
PAL TTX CONTROL REGISTER 2
0
NTSC PEDESTAL CONTROL REGISTER 3/
PAL TTX CONTROL REGISTER 3
0
1
CGMS_WSS_0
0
1
CGMS_WSS_1
0
1
0
CGMS_WSS_2
0
1
0
TELETEXT REQUEST CONTROL REGISTER
0
1
RESERVED
0
1
RESERVED
0
1
0
RESERVED
0
1
0
RESERVED
0
1
MACROVISION REGISTERS
0
1
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
1
MACROVISION REGISTERS
1
0
1
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
1
MACROVISION REGISTERS
1
0
1
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
MACROVISION REGISTERS
1
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
0
MACROVISION REGISTERS
1
MACROVISION REGISTERS
1
0
1
0
01
0
1
0
1
0
1
0
1
0
1
0
1
11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
00h
58h
00h
10h
00h
16h
7Ch
F0h
21h
00h
MACROVISION REGISTERS
02980-
A-
036
Figure 37. Subaddress Register Map
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