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| 型號： | ADV7171KSUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC VIDEO ENC NTSC 44TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Interfacing AV Converters to Blackfin Processors |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 機頂盒，視頻播放器 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-TQFP |
| 供應(yīng)商設(shè)備封裝： | 44-TQFP（10x10） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 786 (CN2011-ZH PDF) |
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ADV7170/ADV7171
Rev. C | Page 28 of 64
REGISTER PROGRAMMING
MODE REGISTER 0 MR0 (MR07 TO MR00)
This section describes each register, including subaddress
register, mode registers, subcarrier frequency registers,
subcarrier phase register, timing registers, closed captioning
extended data registers, closed captioning data registers, and
NTSC pedestal control registers, in terms of its configuration.
(Address [SR4 to SR0] = 00H)
Figure 38 shows the various operations under the control of
Mode Register 0. This register can be read from as well as
written to.
SUBADDRESS REGISTER (SR7 TO SR0)
MR0 BIT DESCRIPTION
The communications register is an 8-bit, write-only register.
After the part has been accessed over the bus and a read/write
operation is selected, the subaddress is set up. The subaddress
register determines to/from which register the operation takes
place.
Output Video Standard Selection (MR01 to MR00)
These bits are used to set up the encode mode. The ADV7170/
ADV7171 can be set up to output NTSC, PAL B/D/G/H/I, and
PAL M/N standard video.
Luminance Filter Control (MR02 to MR04)
Figure 37 shows the various operations under the control of the
subaddress register. Zero should always be written to SR7 to SR6.
These bits specify which luma filter is to be selected. The filter
selection is made independent of whether PAL or NTSC is
selected.
REGISTER SELECT (SR5 TO SR0)
These bits are set up to point to the required starting address.
Chrominance Filter Control (MR05 to MR07)
These bits select the chrominance filter. A low-pass filter can be
selected with a choice of cutoff frequencies, 0.65 MHz,
1.0 MHz, 1.3 MHz, or 2 MHz, along with a choice of CIF
or QCIF filters.
WRITE
SEQUENCE
READ
SEQUENCE
S
SLAVE ADDR
A(S)
SUBADDR
A(S)
DATA
A(S) P
S
SLAVE ADDR
A(S)
SUBADDR
A(S) S
SLAVE ADDR
A(S)
DATA
A(M)
A(M) P
S = START BIT
P = STOP BIT
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
A (S) = NO-ACKNOWLEDGE BY SLAVE
A (M) = NO-ACKNOWLEDGE BY MASTER
LSB = 0
LSB = 1
00221-036
A(S)
Figure 36. Write and Read Sequences
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7171KSUZ-REEL | 功能描述:IC DAC VIDEO ENC NTSC 44TQFP TR RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7171KSZ | 功能描述:IC DAC VIDEO ENC NTSC 44-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7171KSZ | 制造商:Analog Devices 功能描述:IC, VIDEO ENCODER, 10BIT, MQFP-44 |
| ADV7171KSZ-REEL | 功能描述:IC DAC VIDEO ENC NTSC 44-MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7171SU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Digital PAL/NTSC Video Encoder with 10-Bit SSAF⑩ and Advanced Power Management |
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