參數(shù)資料
型號: ADUC824BS
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: MicroConverter, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU
中文描述: 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52
封裝: PLASTIC, MQFP-52
文件頁數(shù): 65/68頁
文件大?。?/td> 1060K
代理商: ADUC824BS
REV. B
ADuC824
–65–
DGND
PLACE ANALOG
COMPONENTS HERE
A
B
C
AGND
DGND
AGND
PLACE DIGITAL
COMPONENTS HERE
PLACE ANALOG
COMPONENTS
HERE
PLACE DIGITAL
COMPONENTS
HERE
GND
PLACE ANALOG
COMPONENTS
HERE
PLACE DIGITAL
COMPONENTS
HERE
Figure 52. System Grounding Schemes
In all of these scenarios, and in more complicated real-life appli-
cations, keep in mind the flow of current from the supplies and
back to ground. Make sure the return paths for all currents are
as close as possible to the paths the currents took to reach their
destinations. For example, do not power components on the
analog side of Figure 52b with DV
DD
since that would force
return currents from DV
DD
to flow through AGND. Also, try to
avoid digital currents flowing under analog circuitry, which could
happen if the user placed a noisy digital chip on the left half
of the board in Figure 52c. Whenever possible, avoid large
discontinuities in the ground plane(s) (such as are formed by a
long trace on the same layer), since they force return signals to
travel a longer path. And of course, make all connections to the
ground plane directly, with little or no trace separating the pin
from its via to ground.
If the user plans to connect fast logic signals (rise/fall time < 5 ns)
to any of the ADuC824’s digital inputs, add a series resistor to
each relevant line to keep rise and fall times longer than 5 ns at
the ADuC824 input pins. A value of 100
or 200
is usually
sufficient to prevent high-speed signals from coupling capacitively
into the ADuC824 and affecting the accuracy of ADC conversions.
ADuC824 System Self-Identification
In some hardware designs it may be an advantage for the soft-
ware running on the ADuC824 target to identify the host Micro-
Converter. For example, code running on the ADuC824 may be
used at future date to run on an ADuC816 MicroConverter host
and the code may be required to operate differently.
The CHIPID SFR is a read-only register located at SFR address
C2 hex. The top nibble of this byte is set to ‘0’ to designate
an ADuC824 host. For an ADuC816 host, the CHIPID SFR
will contain the value ‘1’ in the upper nibble.
OTHER HARDWARE CONSIDERATIONS
To facilitate in-circuit programming, plus in-circuit debug and
emulation options, users will want to implement some simple
connection points in their hardware that will allow easy access
to download, debug, and emulation modes.
In-Circuit Serial Download Access
Nearly all ADuC824 designs will want to take advantage of the
in-circuit reprogrammability of the chip. This is accomplished by a
connection to the ADuC824’s UART, which requires an external
RS-232 chip for level translation if downloading code from a PC.
Basic configuration of an RS-232 connection is illustrated in
Figure 53 with a simple ADM202-based circuit. If users would
rather not design an RS-232 chip onto a board, refer to Application
Note,
uC006
A 4-Wire UART-to-PC Interface
*,
for a simple
(and zero-cost-per-board) method of gaining in-circuit serial
download access to the ADuC824.
In addition to the basic UART connections, users will also need
a way to trigger the chip into download mode. This is accom-
plished via a 1 k
pull-down resistor that can be jumpered
onto the
PSEN
pin, as shown in Figure 53. To get the ADuC824
into download mode, simply connect this jumper and power-
cycle the device (or manually reset the device, if a manual reset
button is available) and it will be ready to receive a new program
serially. With the jumper removed, the device will come up in
normal mode (and run the program) whenever power is cycled or
RESET is toggled.
Note that
PSEN
is normally an output (as described in the Exter-
nal Memory Interface section) and it is sampled as an input only
on the falling edge of RESET (i.e., at power-up or upon an external
manual reset). Note also that if any external circuitry uninten-
tionally pulls
PSEN
low during power-up or reset events, it could
cause the chip to enter download mode and therefore fail to begin
user code execution as it should. To prevent this, ensure that no
external signals are capable of pulling the
PSEN
pin low, except
for the external
PSEN
jumper itself.
Embedded Serial Port Debugger
From a hardware perspective, entry to serial port debug mode is
identical to the serial download entry sequence described above. In
fact, both serial download and serial port debug modes can be
thought of as essentially one mode of operation used in two differ-
ent ways.
Note that the serial port debugger is fully contained on the
ADuC824 device, (unlike “ROM monitor” type debuggers) and
therefore no external memory is needed to enable in-system
debug sessions.
Single-Pin Emulation Mode
Also built into the ADuC824 is a dedicated controller for
single-pin in-circuit emulation (ICE) using standard production
ADuC824 devices. In this mode, emulation access is gained by
connection to a single pin, the
EA
pin. Normally, this pin is hard-
wired either high or low to select execution from internal or
external program memory space, as described earlier. To enable
single-pin emulation mode, however, users will need to pull the
EA
pin high through a 1 k
resistor as shown in Figure 53. The
emulator will then connect to the 2-pin header also shown in
Figure 53. To be compatible with the standard connector that
*
www.analog.com/microconverte
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參數(shù)描述
ADUC824BS-DEN 制造商:Analog Devices 功能描述:
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ADUC824BSZ 功能描述:IC MCU 8K FLASH ADC/DAC 52MQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:MicroConverter® ADuC8xx 標準包裝:250 系列:LPC11Uxx 核心處理器:ARM? Cortex?-M0 芯體尺寸:32-位 速度:50MHz 連通性:I²C,Microwire,SPI,SSI,SSP,UART/USART,USB 外圍設(shè)備:欠壓檢測/復(fù)位,POR,WDT 輸入/輸出數(shù):40 程序存儲器容量:96KB(96K x 8) 程序存儲器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):1.8 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:48-LQFP 包裝:托盤 其它名稱:568-9587
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