參數(shù)資料
型號: ADUC824BS
廠商: ANALOG DEVICES INC
元件分類: 微控制器/微處理器
英文描述: MicroConverter, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU
中文描述: 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52
封裝: PLASTIC, MQFP-52
文件頁數(shù): 38/68頁
文件大?。?/td> 1060K
代理商: ADUC824BS
REV. B
ADuC824
–38–
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many Program, Read, and Erase cycles. In real
terms, a single endurance cycle is composed of four independent,
sequential events. These events are defined as:
a. initial page erase sequence
b. read/verify sequence
c. byte program sequence
d. second read/verify sequence
In reliability qualification, every byte in both the program and
data Flash/EE memory is cycled from 00 hex to FFhex until a
first fail is recorded signifying the endurance limit of the on-chip
Flash/EE memory.
As indicated in the specification pages of this data sheet, the
ADuC824 Flash/EE Memory Endurance qualification has been
carried out in accordance with JEDEC Specification A117 over
the industrial temperature range of –40
°
C, +25
°
C, and +85
°
C.
The results allow the specification of a minimum endurance figure
over supply and temperature of 100,000 cycles, with an endurance
figure of 700,000 cycles being typical of operation at 25
°
C.
Retention quantifies the ability of the Flash/EE memory to retain
its programmed data over time. Again, the ADuC824 has been
qualified in accordance with the formal JEDEC Retention Life-
time Specification (A117) at a specific junction temperature
(T
J
= 55
°
C). As part of this qualification procedure, the Flash/EE
memory is cycled to its specified endurance limit described above,
before data retention is characterized. This means that the Flash/
EE memory is guaranteed to retain its data for its full specified
retention lifetime every time the Flash/EE memory is repro-
grammed. It should also be noted that retention lifetime, based
on an activation energy of 0.6 eV, will derate with T
J
as shown
in Figure 27.
A single Flash/EE
Memory
Endurance Cycle
40
60
70
90
T
J
JUNCTION TEMPERATURE
C
R
250
200
150
100
50
0
50
80
110
300
100
A100 YEARS MIN.
AT T
J
= 55 C
Figure 27. Flash/EE Memory Data Retention
Using the Flash/EE Program Memory
The 8 Kbyte Flash/EE Program Memory array is mapped
into the lower 8 Kbytes of the 64 Kbytes program space
addressable by the ADuC824, and is used to hold user code
in typical applications.
The program memory Flash/EE memory arrays can be pro-
grammed in one of two modes, namely:
Serial Downloading (In-Circuit Programming)
As part of its factory boot code, the ADuC824 facilitates serial
code download via the standard UART serial port. Serial down-
load mode is automatically entered on power-up if the external
pin,
PSEN
, is pulled low through an external resistor as shown
in Figure 28. Once in this mode, the user can download code to
the program memory array while the device is sited in its target
application hardware. A PC serial download executable is pro-
vided as part of the ADuC824 QuickStart development system.
The Serial Download protocol is detailed in a MicroConverter
Applications Note uC004 available from the ADI MicroConverter
www.analog.com/microconverter.
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相關代理商/技術參數(shù)
參數(shù)描述
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