參數(shù)資料
型號(hào)： ADUC824BS
廠商： ANALOG DEVICES INC
元件分類： 微控制器/微處理器
英文描述： MicroConverter, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU
中文描述： 8-BIT, FLASH, 12.58 MHz, MICROCONTROLLER, PQFP52
封裝： PLASTIC, MQFP-52
文件頁(yè)數(shù)： 23/68頁(yè)
文件大?。?/td> 1060K
代理商： ADUC824BS
REV. B
ADuC824
–23–
The SFR space is mapped to the upper 128 bytes of internal data
memory space and accessed by direct addressing only. It provides
an interface between the CPU and all on-chip peripherals. A block
diagram showing the programming model of the ADuC824 via
the SFR area is shown in Figure 16. A complete SFR map is shown
in Figure 17.
128-BYTE
SPECIAL
FUNCTION
REGISTER
AREA
8 KBYTE
ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE
FLASH/EE PROGRAM
MEMORY
8051-
COMPATIBLE
CORE
OTHER ON-CHIP
PERIPHERALS
TEMPERATURE
SENSOR
CURRENT
SOURCES
12-BIT DAC
SERIAL I/O
WDT
PSM
TIC
PLL
DUAL
SIGMA-DELTA ADCs
640-BYTE
ELECTRICALLY
REPROGRAMMABLE
NONVOLATILE
FLASH/EE DATA
MEMORY
256 BYTES
RAM
Figure 16. Programming Model
OVERVIEW OF MCU-RELATED SFRs
Accumulator SFR
ACC is the Accumulator register and is used for math operations
including addition, subtraction, integer multiplication and division,
and Boolean bit manipulations. The mnemonics for accumulator-
specific instructions refer to the Accumulator as A.
B SFR
The B register is used with the ACC for multiplication and divi-
sion operations. For other instructions it can be treated as a
general-purpose scratchpad register.
Stack Pointer SFR
The SP register is the stack pointer and is used to hold an internal
RAM address that is called the
‘top of the stack.’
The SP register is
incremented before data is stored during PUSH and CALL execu-
tions. While the stack may reside anywhere in on-chip RAM, the
SP register is initialized to 07H after a reset. This causes the
stack to begin at location 08H.
Data Pointer
The Data Pointer is made up of three 8-bit registers, named
DPP (page byte), DPH (high byte), and DPL (low byte).
These are used to provide memory addresses for internal and
external code access and external data access. It may be ma-
nipulated as a 16-bit register (DPTR = DPH, DPL), although
INC DPTR instructions will automatically carry over to DPP, or
as three independent 8-bit registers (DPP, DPH, DPL).
Program Status Word SFR
The PSW register is the Program Status Word which contains
several bits reflecting the current status of the CPU as detailed in
Table I.
SFR Address
Power ON Default Value
Bit Addressable
D0H
00H
Yes
Y
C
C
A
0
F
1
S
R
0
S
R
V
O
1
F
P
Table I. PSW SFR Bit Designations
Bit
Name
Description
7
6
5
4
3
CY
AC
F0
RS1
RS0
Carry Flag
Auxiliary Carry Flag
General-Purpose Flag
Register Bank Select Bits
RS1
RS0
0
0
0
1
1
0
1
1
Overflow Flag
General-Purpose Flag
Parity Bit
Selected Bank
0
1
2
3
2
1
0
OV
F1
P
Power Control SFR
The Power Control (PCON) register contains bits for power-
saving options and general-purpose status flags as shown in
Table II.
SFR Address
Power ON Default Value
Bit Addressable
87H
00H
No
D
O
M
S
D
P
I
R
E
S
D
P
0
T
N
I
F
F
O
E
L
A
1
F
G
0
F
G
D
P
L
D
I
Table II. PCON SFR Bit Designations
Bit
Name
Description
7
6
SMOD
SERIPD
Double UART Baud Rate
I
2
C/SPI Power-Down Interrupt
Enable
INT0
Power-Down Interrupt
Enable
Disable ALE Output
General-Purpose Flag Bit
General-Purpose Flag Bit
Power-Down Mode Enable
Idle Mode Enable
5
INT0PD
4
3
2
1
0
ALEOFF
GF1
GF0
PD
IDL
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ADUC824BS-DEN 制造商:Analog Devices 功能描述:
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