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| 型號： | ADUC7128BCPZ126-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 35/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS MCU ARM7 ADC/DDS 64-LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | ARM7 Applications & Tools Intro to ARM7 Core & Microconverters Direct Digital Synthesis Tutorial Series (1 of 7): Introduction |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 41.78MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | PLA，POR，PWM，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 28 |
| 程序存儲器容量： | 126KB（63K x 16） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 8K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x12b; D/A 1x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 64-LFQFN 裸露焊盤，CSP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 配用： | EVAL-ADUC7128QSPZ-ND - KIT DEV FOR ADUC7128 |
| 其它名稱： | ADUC7128BCPZ126-RLDKR |
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ADuC7128/ADuC7129
Rev. 0 | Page 40 of 92
FLASH/EE MEMORY SECURITY
The 126 kB of Flash/EE memory available to the user can be
read and write protected. Bit 31 of the FEE0PRO/FEE0HID MMR
protects the 126 kB from being read through JTAG and also in
parallel programming mode. The other 31 bits of this register
protect writing to the Flash/EE memory; each bit protects four
pages, that is, 2 kB. Write protection is activated for all access types.
FEE1PRO and FEE1HID similarly protect the second 64 kB block.
All 32 bits of this are used to protect four pages at a time.
Three Levels of Protection
Protection can be set and removed by writing directly into
FEExHID MMR. This protection does not remain after reset.
Protection can be set by writing into FEExPRO MMR. It takes
effect only after a save protection command (0x0C) and a reset.
The FEExPRO MMR is protected by a key to avoid direct access.
The key is saved once and must be entered again to modify
FEExPRO. A mass erase sets the key back to 0xFFFF but also
erases all the user code.
The Flash/EE memory can be permanently protected by using
the FEEPRO MMR and a particular value of the 0xDEADDEAD
key. Entering the key again to modify the FEExPRO register is
not allowed.
Sequence to Write the Key
1.
Write the bit in FEExPRO corresponding to the page to be
protected.
2.
Enable key protection by setting Bit 6 of FEExMOD (Bit 5
must equal 0).
3.
Write a 32-bit key in FEExADR, FEExDAT.
4.
Run the write key command 0×0C in FEExCON; wait for
the read to be successful by monitoring FEExSTA.
5.
Reset the part.
To remove or modify the protection, the same sequence is used
with a modified value of FEExPRO. If the key chosen is the value
0xDEAD, then the memory protection cannot be removed. Only
a mass erase unprotects the part, but it also erases all user code.
The sequence to write the key is shown in the following example;
this protects writing Page 4 to Page 7 of the Flash/EE memory:
FEE0PRO=0xFFFFFFFD;
//Protect pages 4 to 7
FEE0MOD=0x48;
//Write key enable
FEE0ADR=0x1234;
//16 bit key value
FEE0DAT=0x5678;
//16 bit key value
FEE0CON= 0x0C;
// Write key command
The same sequence should be followed to protect the part
permanently with FEExADR = 0xDEAD and FEExDAT =
0xDEAD.
FLASH/EE CONTROL INTERFACE
FEE0DAT Register
Name
Address
Default Value
Access
FEE0DAT
0xFFFF0E0C
0xXXXX
R/W
FEE0DAT is a 16-bit data register.
FEE0ADR Register
Name
Address
Default Value
Access
FEE0ADR
0xFFFF0E10
0x0000
R/W
FEE0ADR is a 16-bit address register.
FEE0SGN Register
Name
Address
Default Value
Access
FEE0SGN
0xFFFF0E18
0xFFFFFF
R
FEE0SGN is a 24-bit code signature.
FEE0PRO Register
Name
Address
Default Value
Access
FEE0PRO
0xFFFF0E1C
0x00000000
R/W
FEE0PRO provides protection following subsequent reset MMR.
It requires a software key (see Table 44).
FEE0HID Register
Name
Address
Default Value
Access
FEE0HID
0xFFFF0E20
0xFFFFFFFF
R/W
FEE0HID provides immediate protection MMR. It does not
require any software keys (see Table 44).
Command Sequence for Executing a Mass Erase
FEE0DAT = 0x3CFF;
FEE0ADR = 0xFFC3;
FEE0MOD = FEE0MOD|0x8;
//Erase key enable
FEE0CON = 0x06;
//Mass erase command
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