參數(shù)資料
型號(hào): ADS8519IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): ADC
英文描述: 3-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC32
封裝: 5 X 5 MM, QFN-32
文件頁(yè)數(shù): 9/25頁(yè)
文件大?。?/td> 396K
代理商: ADS8519IRHBR
www.ti.com
PRODUCTPREVIEW
External
DATACLK
.
2
3
4
35
34
36
17
16
20
21
19
1
Null
D
Q
A00
D
Q
Null
D
Q
B00
D
Q
A15
D
Q
A16
D
Q
B15
D
Q
B16
D
Q
TAG(A)
TAG(B)
DATA (A)
DATA (B)
DATACLK
(both A & B )
SYNC
(both A & B )
DATA ( B )
Nth Conversion Data
B15
A15
B00
B13
B14
B01
A00
A14
A13
A01
DATA ( A )
A15
A00
A13
A14
A01
18
Null
A
Null
B
Null
A
ADS8519A
TAG
DATA
DATACLK
ADS 8519B
TAG
DATA
DATACLK
Processor
SCLK
GPIO
SDI
TAG(A) = 0
R/C
CS
R/C
CS
R/C
BUSY
EXT/INT tied high, CS of both converter A and B, TAG input of converter A are tied low.
ANALOG INPUTS
SLAS462 – JUNE 2007
Figure 22. Timing of TAG Feature With Single Conversion (Using External DATACLK)
The ADS8519 has three analog input ranges as shown in Table 3. The offset specification is factory calibrated
with internal resistors. The gain specification is factory calibrated with 0.1%, 0.25-W, external resistors as shown
in Figure 25 and Figure 26. The external resistors can be omitted if a larger gain error is acceptable or if using
software calibration. The hardware trim circuitry shown in Figure 25 and Figure 26 can reduce the error to zero.
The analog input pins R1IN, R2IN, and R3IN have ±25-V overvoltage protection. The input signal must be
referenced to AGND1. This will minimized the ground loop problem typical to analog designs. The analog input
should be driven by a low impedance source. A typical driving circuit using OPA627 or OPA132 is shown in
The ADS8519 can operate with its internal 4.096-V reference or an external reference. An external reference
connected to pin 6 (REF) bypasses the internal reference. The external reference must drive the 4-k
resistor
that separates pin 6 from the internal reference (see the illustration on page 1). The load will vary with the
difference between the internal and external reference voltages. The external reference voltage can vary from
3.9 V to 4.2 V. The internal reference will be approximately 4.096 V. The reference, whether internal or external,
is buffered internally with a buffer with its output on pin 5 (CAP).
The ADS8519 is factory tested with 2.2-
μF capacitors connected to pins 5 and 6 (CAP and REF). Each capacitor
should be placed as close as possible to its pin. The capacitor on pin 6 band limits the internal reference noise. A
smaller capacitor can be used but it may degrade SNR and SINAD The capacitor on pin 5 stabilizes the
reference buffer and provides switching charge to the CDAC during conversion. Capacitors smaller than 1
μF
can cause the buffer to become unstable may not hold sufficient charge for the CDAC. The parts are tested to
specifications with 2.2
μF so larger capacitors are not necessary. The ESR (equivalent series resistance) of
these compensation capacitors is also critical. Keep the total ESR under 3
. See the TYPICAL
CHARACTERISTICS section concerning how ESR affects performance.
Neither the internal reference nor the buffer should be used to drive an external load. Such loading can degrade
performance. Any load on the internal reference causes a voltage drop across the 4-k
resistor and will affect
gain. The internal buffer is capable of driving ±2-mA loads but any load can cause perturbations of the reference
at the CDAC, degrading performance. It should be pointed out that, unlike other competitor’s parts with similar
input structure, the ADS8519 does not require a second high speed amplifier used as buffer to isolate the CAP
pin from the signal dependent current in the R3IN pin but can tolerate it if one do exist.
Copyright 2007, Texas Instruments Incorporated
17
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