參數(shù)資料
型號(hào)： ADS8519IRHBR
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 3-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PQCC32
封裝： 5 X 5 MM, QFN-32
文件頁數(shù)： 19/25頁
文件大?。?/td> 396K
代理商： ADS8519IRHBR
www.ti.com
PRODUCTPREVIEW
SLAS462 – JUNE 2007
ELECTRICAL CHARACTERISTICS (continued)
At TA = –40°C to 85°C, fs = 250 kHz, VDIG = VANA = 5 V, using internal reference (unless otherwise specified)
ADS8519I
ADS8519IB
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
No missing codes
15
16
Bits
Transition noise
(3)
0.67
LSB
±10 V range
–0.05
±0.5
0.05
–0.05
±0.5
0.05
Full-scale
Int. Ref.
%FSR
error
(4) (5)
All other ranges
–0.5
TBD
0.5
–0.5
TBD
0.5
Full-scale error drift
Int. Ref.
±7
ppm/
°C
±10 V range
–0.05
0.05
–0.05
0.05
Full-scale
Ext. Ref.
%FSR
error
(4) (5)
All other ranges
–0.5
0.5
–0.5
0.5
Full-scale error drift
Ext. Ref.
±2
ppm/
°C
Bipolar zero error
(4)
–4
4
–2
2
mV
Bipolar zero error drift
±2
ppm/
°C
Unipolar zero
8.192 V
–20
20
–20
20
mV
error
(4)
Unipolar zero error drift
±0.4
ppm/
°C
Recovery to rated accuracy after
1-
μF Capacitor to CAP
1
ms
power down
Power supply sensitivity
+4.75 V < VD < +5.25 V
–8
8
–8
8
LSB
(VDIG = VANA = VD)
AC ACCURACY
SFDR
Spurious-free dynamic range
fI = 20 kHz
95
102
97
102
dB
(6)
THD
Total harmonic distortion
fI = 20 kHz
–100
–94
–100
–96
dB
fI = 20 kHz
87
91
89
91
dB
SINAD
Signal-to-(noise+distortion)
–60-dB Input
30
32
dB
SNR
Signal-to-noise ratio
fI = 20 kHz
88
92
90
92
dB
Full-power bandwidth
(7)
500
kHz
SAMPLING DYNAMICS
Aperture delay
5
ns
Transient response
FS Step
2
μs
Overvoltage recovery
(8)
150
ns
REFERENCE
Internal reference voltage
No load
4.076
4.096
4.116
4.076
4.096
4.116
V
Internal reference source current
1
μA
(must use external buffer)
Internal reference drift
8
ppm/
°C
External reference voltage range
2.5
4.096
4.1
2.5
4.096
4.1
V
for specified linearity
External reference current drain
Ext. 4.096-V Ref.
100
μA
DIGITAL INPUTS
Logic levels
VIL
Low-level input voltage
VDIG = 1.65 V ~ 5.25 V
–0.3
0.8, 0.35 xVDIG
–0.3
0.8, 0.35 xVDIG
V
VIH
High-level input voltage
VDIG = 1.65 V ~ 5.25 V
2.0, 0.65 xVDIG
VDIG +0.3 V
2.0, 0.65 xVDIG
VDIG +0.3 V
V
IIL
Low-level input current
VIL = 0 V
±10
μA
IIH
High-level input current
VIH = 5 V
±10
μA
DIGITAL OUTPUTS
Data format (Serial 16-bits)
Data coding (Binary 2's
complement or straight binary)
Pipeline delay (Conversion results
only available after completed
conversion.)
(3)
Typical rms noise at worst case transitions and temperatures.
(4)
As measured with circuit shown in Figure 25 and Figure 26.
(5)
For bipolar input ranges, full-scale error is the worst case of –full-scale or +full-scale uncalibrated deviation from ideal first and last code
transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. For unipolar input
ranges, full-scale error is the deviation of the last code transition divided by the transition voltage. It also includes the effect of offset
error.
(6)
All specifications in dB are referred to a full-scale ±10-V input.
(7)
Full-power bandwidth is defined as the full-scale input frequency at which signal-to-(noise + distortion) degrades to 60 dB.
(8)
Recovers to specified performance after 2 x FS input overvoltage.
Copyright 2007, Texas Instruments Incorporated
3
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